Patents by Inventor Srinivas Venkata Veeramreddi
Srinivas Venkata Veeramreddi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20230275614Abstract: A wireless transceiver. The transceiver includes: (i) a transmit signal path; (ii) a calibration path, comprising a conductor to connect a calibration tone into the transmit signal path; (iii) a receive signal path, comprising a first data signal path to process a first data and a second data signal path, different than the first data signal path, to process a second data; (iv) a first capacitive coupling to couple a response to the calibration tone from the transmit signal path to the first data signal path; and (v) a second capacitive coupling to couple a response to the calibration tone from the transmit signal path to the second data signal path.Type: ApplicationFiled: May 5, 2023Publication date: August 31, 2023Inventors: Debapriya Sahu, Rohit Chatterjee, Srinivas Venkata Veeramreddi
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Publication number: 20230208277Abstract: A switch-mode power supply and a zero current detector for use therein. A zero current detector includes an input stage and an output stage. The output stage is coupled to the input stage. The output stage includes a detector output terminal, a first transistor, and a second transistor. The first transistor includes an input terminal and a control terminal. The input terminal is coupled to the detector output terminal. The control terminal is coupled to the input stage. The second transistor includes an input terminal, a control terminal, and an output terminal. The input terminal is coupled to the control terminal of the first transistor. The control terminal is coupled to the input terminal of the second transistor. The output terminal is coupled to ground.Type: ApplicationFiled: February 21, 2023Publication date: June 29, 2023Applicant: TEXAS INSTRUMENTS INCORPORATEDInventors: Srinivas Venkata Veeramreddi, Subhash Sahni
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Patent number: 11683066Abstract: A wireless transceiver. The transceiver includes: (i) a transmit signal path; (ii) a calibration path, comprising a conductor to connect a calibration tone into the transmit signal path; (iii) a receive signal path, comprising a first data signal path to process a first data and a second data signal path, different than the first data signal path, to process a second data; (iv) a first capacitive coupling to couple a response to the calibration tone from the transmit signal path to the first data signal path; and (v) a second capacitive coupling to couple a response to the calibration tone from the transmit signal path to the second data signal path.Type: GrantFiled: June 16, 2021Date of Patent: June 20, 2023Assignee: TEXAS INSTRUMENTS INCORPORATEDInventors: Debapriya Sahu, Rohit Chatterjee, Srinivas Venkata Veeramreddi
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Patent number: 11588392Abstract: A switch-mode power supply and a zero current detector for use therein. A zero current detector includes an input stage and an output stage. The output stage is coupled to the input stage. The output stage includes a detector output terminal, a first transistor, and a second transistor. The first transistor includes an input terminal and a control terminal. The input terminal is coupled to the detector output terminal. The control terminal is coupled to the input stage. The second transistor includes an input terminal, a control terminal, and an output terminal. The input terminal is coupled to the control terminal of the first transistor. The control terminal is coupled to the input terminal of the second transistor. The output terminal is coupled to ground.Type: GrantFiled: December 1, 2020Date of Patent: February 21, 2023Assignee: TEXAS INSTRUMENTS INCORPORATEDInventors: Srinivas Venkata Veeramreddi, Subhash Sahni
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Patent number: 11444537Abstract: In an embodiment, a circuit includes a Direct Current (DC)-DC buck-boost converter and a controller. The controller includes an error amplifier configured to receive a feedback signal responsive to an output signal of the buck-boost converter. The error amplifier is configured to compare the feedback signal and a reference signal to generate an error signal. The controller includes a modulator circuit that is configured to receive the error signal and compare the error signal with a periodic ramp signal to generate a modulated signal. The controller further includes a digital logic block to generate switching signals in response to the modulated signal that is fed to the buck-boost converter to control the output signal of the buck-boost converter. The controller includes a capacitance multiplier circuit coupled to the output of the error amplifier to configure a dominant pole so as to compensate the buck-boost converter.Type: GrantFiled: March 2, 2020Date of Patent: September 13, 2022Assignee: TEXAS INSTRUMENTS INCORPORATEDInventors: Srinivas Venkata Veeramreddi, Sudhir Polarouthu
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Patent number: 11336180Abstract: Disclosed embodiments of a power converter include a power output stage for generating a first voltage output and an auxiliary power output stage for generating a second voltage output. The power converter further includes a pulse frequency modulation (PFM) controller for controlling the power output stage in response to the first voltage output generated by the power output stage during a first period of time in which the power output stage operates in a PFM mode, and a pulse width modulation (PWM) controller for controlling the auxiliary power output stage in response to the second voltage output generated by the auxiliary power output stage during a second period of time. At least a portion of the first period of time is concurrent with the second period of time.Type: GrantFiled: October 16, 2020Date of Patent: May 17, 2022Assignee: Texas Instruments IncorporatedInventor: Srinivas Venkata Veeramreddi
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Patent number: 11206051Abstract: A device includes a frequency multiplier circuit to receive a base frequency signal, multiply the base frequency signal, and output the multiple of the base frequency signal, and includes an offset frequency generator, including at least one logic gate, to receive the multiple of the base frequency signal and output an offset frequency signal from the at least one logic gate combination. A mixing circuit receives the offset frequency signal and a digital data signal, converts the digital data signal into an analog representation of the digital data signal, and mixes the offset frequency signal and the analog representation of the digital data signal to produce a mixed signal. The device yet further includes a power amplifier to amplify the mixed signal and output the amplified mixed signal as an output frequency signal of the device.Type: GrantFiled: June 9, 2020Date of Patent: December 21, 2021Assignee: TEXAS INSTRUMENTS INCORPORATEDInventors: Debapriya Sahu, Srinivas Venkata Veeramreddi, Raghu Ganesan
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Publication number: 20210314018Abstract: A wireless transceiver. The transceiver includes: (i) a transmit signal path; (ii) a calibration path, comprising a conductor to connect a calibration tone into the transmit signal path; (iii) a receive signal path, comprising a first data signal path to process a first data and a second data signal path, different than the first data signal path, to process a second data; (iv) a first capacitive coupling to couple a response to the calibration tone from the transmit signal path to the first data signal path; and (v) a second capacitive coupling to couple a response to the calibration tone from the transmit signal path to the second data signal path.Type: ApplicationFiled: June 16, 2021Publication date: October 7, 2021Inventors: Debapriya Sahu, Rohit Chatterjee, Srinivas Venkata Veeramreddi
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Patent number: 11070242Abstract: A wireless transceiver. The transceiver includes: (i) a transmit signal path; (ii) a calibration path, comprising a conductor to connect a calibration tone into the transmit signal path; (iii) a receive signal path, comprising a first data signal path to process a first data and a second data signal path, different than the first data signal path, to process a second data; (iv) a first capacitive coupling to couple a response to the calibration tone from the transmit signal path to the first data signal path; and (v) a second capacitive coupling to couple a response to the calibration tone from the transmit signal path to the second data signal path.Type: GrantFiled: May 6, 2019Date of Patent: July 20, 2021Assignee: TEXAS INSTRUMENTS INCORPORATEDInventors: Debapriya Sahu, Rohit Chatterjee, Srinivas Venkata Veeramreddi
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Publication number: 20210083565Abstract: A switch-mode power supply and a zero current detector for use therein. A zero current detector includes an input stage and an output stage. The output stage is coupled to the input stage. The output stage includes a detector output terminal, a first transistor, and a second transistor. The first transistor includes an input terminal and a control terminal. The input terminal is coupled to the detector output terminal. The control terminal is coupled to the input stage. The second transistor includes an input terminal, a control terminal, and an output terminal. The input terminal is coupled to the control terminal of the first transistor. The control terminal is coupled to the input terminal of the second transistor. The output terminal is coupled to ground.Type: ApplicationFiled: December 1, 2020Publication date: March 18, 2021Inventors: Srinivas Venkata Veeramreddi, Subhash Sahni
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Publication number: 20210050784Abstract: Disclosed embodiments of a power converter include a power output stage for generating a first voltage output and an auxiliary power output stage for generating a second voltage output. The power converter further includes a pulse frequency modulation (PFM) controller for controlling the power output stage in response to the first voltage output generated by the power output stage during a first period of time in which the power output stage operates in a PFM mode, and a pulse width modulation (PWM) controller for controlling the auxiliary power output stage in response to the second voltage output generated by the auxiliary power output stage during a second period of time. At least a portion of the first period of time is concurrent with the second period of time.Type: ApplicationFiled: October 16, 2020Publication date: February 18, 2021Inventor: Srinivas Venkata VEERAMREDDI
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Patent number: 10855164Abstract: A switch-mode power supply and a zero current detector for use therein. A zero current detector includes an input stage and an output stage. The output stage is coupled to the input stage. The output stage includes a detector output terminal, a first transistor, and a second transistor. The first transistor includes an input terminal and a control terminal. The input terminal is coupled to the detector output terminal. The control terminal is coupled to the input stage. The second transistor includes an input terminal, a control terminal, and an output terminal. The input terminal is coupled to the control terminal of the first transistor. The control terminal is coupled to the input terminal of the second transistor. The output terminal is coupled to ground.Type: GrantFiled: September 6, 2018Date of Patent: December 1, 2020Assignee: Texas Instruments IncorporatedInventors: Srinivas Venkata Veeramreddi, Subhash Sahni
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Publication number: 20200358472Abstract: A wireless transceiver. The transceiver includes: (i) a transmit signal path; (ii) a calibration path, comprising a conductor to connect a calibration tone into the transmit signal path; (iii) a receive signal path, comprising a first data signal path to process a first data and a second data signal path, different than the first data signal path, to process a second data; (iv) a first capacitive coupling to couple a response to the calibration tone from the transmit signal path to the first data signal path; and (v) a second capacitive coupling to couple a response to the calibration tone from the transmit signal path to the second data signal path.Type: ApplicationFiled: May 6, 2019Publication date: November 12, 2020Inventors: Debapriya Sahu, Rohit Chatterjee, Srinivas Venkata Veeramreddi
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Patent number: 10811967Abstract: Disclosed embodiments of a power converter include a power output stage for generating a first voltage output and an auxiliary power output stage for generating a second voltage output. The power converter further includes a pulse frequency modulation (PFM) controller for controlling the power output stage in response to the first voltage output generated by the power output stage during a first period of time in which the power output stage operates in a PFM mode, and a pulse width modulation (PWM) controller for controlling the auxiliary power output stage in response to the second voltage output generated by the auxiliary power output stage during a second period of time. At least a portion of the first period of time is concurrent with the second period of time.Type: GrantFiled: August 31, 2018Date of Patent: October 20, 2020Assignee: Texas Instruments IncorporatedInventor: Srinivas Venkata Veeramreddi
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Publication number: 20200304161Abstract: A device includes a frequency multiplier circuit to receive a base frequency signal, multiply the base frequency signal, and output the multiple of the base frequency signal, and includes an offset frequency generator, including at least one logic gate, to receive the multiple of the base frequency signal and output an offset frequency signal from the at least one logic gate combination. A mixing circuit receives the offset frequency signal and a digital data signal, converts the digital data signal into an analog representation of the digital data signal, and mixes the offset frequency signal and the analog representation of the digital data signal to produce a mixed signal. The device yet further includes a power amplifier to amplify the mixed signal and output the amplified mixed signal as an output frequency signal of the device.Type: ApplicationFiled: June 9, 2020Publication date: September 24, 2020Inventors: DEBAPRIYA SAHU, SRINIVAS VENKATA VEERAMREDDI, RAGHU GANESAN
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Publication number: 20200274447Abstract: In an embodiment, a circuit includes a Direct Current (DC)-DC buck-boost converter and a controller. The controller includes an error amplifier configured to receive a feedback signal responsive to an output signal of the buck-boost converter. The error amplifier is configured to compare the feedback signal and a reference signal to generate an error signal. The controller includes a modulator circuit that is configured to receive the error signal and compare the error signal with a periodic ramp signal to generate a modulated signal. The controller further includes a digital logic block to generate switching signals in response to the modulated signal that is fed to the buck-boost converter to control the output signal of the buck-boost converter. The controller includes a capacitance multiplier circuit coupled to the output of the error amplifier to configure a dominant pole so as to compensate the buck-boost converter.Type: ApplicationFiled: March 2, 2020Publication date: August 27, 2020Inventors: Srinivas Venkata Veeramreddi, Sudhir Polarouthu
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Patent number: 10715194Abstract: A device includes a frequency multiplier circuit to receive a base frequency signal, multiply the base frequency signal, and output the multiple of the base frequency signal, and includes an offset frequency generator, including at least one logic gate, to receive the multiple of the base frequency signal and output an offset frequency signal from the at least one logic gate combination. A mixing circuit receives the offset frequency signal and a digital data signal, converts the digital data signal into an analog representation of the digital data signal, and mixes the offset frequency signal and the analog representation of the digital data signal to produce a mixed signal. The device yet further includes a power amplifier to amplify the mixed signal and output the amplified mixed signal as an output frequency signal of the device.Type: GrantFiled: December 29, 2017Date of Patent: July 14, 2020Assignee: TEXAS INSTRUMENTS INCORPORATEDInventors: Debapriya Sahu, Srinivas Venkata Veeramreddi, Raghu Ganesan
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Publication number: 20200083796Abstract: A switch-mode power supply and a zero current detector for use therein. A zero current detector includes an input stage and an output stage. The output stage is coupled to the input stage. The output stage includes a detector output terminal, a first transistor, and a second transistor. The first transistor includes an input terminal and a control terminal. The input terminal is coupled to the detector output terminal. The control terminal is coupled to the input stage. The second transistor includes an input terminal, a control terminal, and an output terminal. The input terminal is coupled to the control terminal of the first transistor. The control terminal is coupled to the input terminal of the second transistor. The output terminal is coupled to ground.Type: ApplicationFiled: September 6, 2018Publication date: March 12, 2020Inventors: Srinivas Venkata VEERAMREDDI, Subhash SAHNI
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Patent number: 10581326Abstract: In an embodiment, a circuit includes a Direct Current (DC)-DC buck-boost converter and a controller. The controller includes an error amplifier configured to receive a feedback signal responsive to an output signal of the buck-boost converter. The error amplifier is configured to compare the feedback signal and a reference signal to generate an error signal. The controller includes a modulator circuit that is configured to receive the error signal and compare the error signal with a periodic ramp signal to generate a modulated signal. The controller further includes a digital logic block to generate switching signals in response to the modulated signal that is fed to the buck-boost converter to control the output signal of the buck-boost converter. The controller includes a capacitance multiplier circuit coupled to the output of the error amplifier to configure a dominant pole so as to compensate the buck-boost converter.Type: GrantFiled: November 1, 2013Date of Patent: March 3, 2020Assignee: TEXAS INSTRUMENTS INCORPORATEDInventors: Srinivas Venkata Veeramreddi, Sudhir Polarouthu
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Publication number: 20190207635Abstract: A device includes a frequency multiplier circuit to receive a base frequency signal, multiply the base frequency signal, and output the multiple of the base frequency signal, and includes an offset frequency generator, including at least one logic gate, to receive the multiple of the base frequency signal and output an offset frequency signal from the at least one logic gate combination. A mixing circuit receives the offset frequency signal and a digital data signal, converts the digital data signal into an analog representation of the digital data signal, and mixes the offset frequency signal and the analog representation of the digital data signal to produce a mixed signal. The device yet further includes a power amplifier to amplify the mixed signal and output the amplified mixed signal as an output frequency signal of the device.Type: ApplicationFiled: December 29, 2017Publication date: July 4, 2019Inventors: DEBAPRIYA SAHU, SRINIVAS VENKATA VEERAMREDDI, RAGHU GANESAN