Patents by Inventor Srinivasa R. Sridharan

Srinivasa R. Sridharan has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11941428
    Abstract: Techniques are disclosed relating to an I/O agent circuit. The I/O agent circuit may include one or more queues and a transaction pipeline. The I/O agent circuit may issue, to the transaction pipeline from a queue of the one or more queues, a transaction of a series of transactions enqueued in a particular order. The I/O agent circuit may generate, at the transaction pipeline, a determination to return the transaction to the queue based on a detection of one or more conditions being satisfied. Based on the determination, the I/O agent circuit may reject, at the transaction pipeline, up to a threshold number of transactions that issued from the queue after the transaction issued. The I/O agent circuit may insert the transaction at a head of the queue such that the transaction is enqueued at the queue sequentially first for the series of transactions according to the particular order.
    Type: Grant
    Filed: March 31, 2022
    Date of Patent: March 26, 2024
    Assignee: Apple Inc.
    Inventors: Sagi Lahav, Lital Levy-Rubin, Gaurav Garg, Gerard R. Williams, III, Samer Nassar, Per H. Hammarlund, Harshavardhan Kaushikkar, Srinivasa Rangan Sridharan, Jeff Gonion
  • Patent number: 10298511
    Abstract: In some embodiments, a system includes a memory system, plurality of computing devices, and plurality of queues. The plurality of computing devices perform actions dependent on data stored at the memory device, where traffic between the plurality of computing devices and the memory device has at least a first priority level and a second priority level. The first priority level is higher than the second priority level. The plurality of queues pass data between the memory device and the plurality of computing devices. A particular queue allocates a first portion of the particular queue to traffic having the first priority level and allocates a second portion of the particular queue to traffic having the first priority level and to traffic having the second priority level.
    Type: Grant
    Filed: August 24, 2016
    Date of Patent: May 21, 2019
    Inventors: Manu Gulati, Christopher D. Shuler, Benjamin K. Dodge, Thejasvi M. Vijayaraj, Harshavardhan Kaushikkar, Yang Yang, Rong Z. Hu, Srinivasa R. Sridharan, Wolfgang H. Klingauf, Neeraj Parik
  • Patent number: 10206175
    Abstract: Techniques are disclosed relating to a split communications fabric topology. In some embodiments, an apparatus includes a communications fabric structure with multiple fabric units. The fabric units may be configured to arbitrate among control packets of different messages. In some embodiments, a processing element is configured to generate a message that includes a control packet and one or more data packets. In some embodiments, the processing element is configured to transmit the control packet to a destination processing element (e.g., a memory controller) via the communications fabric structure and transmit the data packets to a data buffer. In some embodiments, the destination processing element is configured to retrieve the data packets from the data buffer in response to receiving the control packet via the hierarchical fabric structure. In these embodiments, bypassing the fabric structure for data packets may reduce power consumption.
    Type: Grant
    Filed: November 20, 2017
    Date of Patent: February 12, 2019
    Assignee: Apple Inc.
    Inventors: Munetoshi Fukami, Srinivasa R. Sridharan, Harshavardhan Kaushikkar
  • Publication number: 20180077649
    Abstract: Techniques are disclosed relating to a split communications fabric topology. In some embodiments, an apparatus includes a communications fabric structure with multiple fabric units. The fabric units may be configured to arbitrate among control packets of different messages. In some embodiments, a processing element is configured to generate a message that includes a control packet and one or more data packets. In some embodiments, the processing element is configured to transmit the control packet to a destination processing element (e.g., a memory controller) via the communications fabric structure and transmit the data packets to a data buffer. In some embodiments, the destination processing element is configured to retrieve the data packets from the data buffer in response to receiving the control packet via the hierarchical fabric structure. In these embodiments, bypassing the fabric structure for data packets may reduce power consumption.
    Type: Application
    Filed: November 20, 2017
    Publication date: March 15, 2018
    Inventors: Munetoshi Fukami, Srinivasa R. Sridharan, Harshavardhan Kaushikkar
  • Publication number: 20180063016
    Abstract: In some embodiments, a system includes a memory system, plurality of computing devices, and plurality of queues. The plurality of computing devices perform actions dependent on data stored at the memory device, where traffic between the plurality of computing devices and the memory device has at least a first priority level and a second priority level. The first priority level is higher than the second priority level. The plurality of queues pass data between the memory device and the plurality of computing devices. A particular queue allocates a first portion of the particular queue to traffic having the first priority level and allocates a second portion of the particular queue to traffic having the first priority level and to traffic having the second priority level.
    Type: Application
    Filed: August 24, 2016
    Publication date: March 1, 2018
    Inventors: Manu Gulati, Christopher D. Shuler, Benjamin K. Dodge, Thejasvi M. Vijayaraj, Harshavardhan Kaushikkar, Yang Yang, Rong Z. Hu, Srinivasa R. Sridharan, Wolfgang H. Klingauf, Neeraj Parik
  • Patent number: 9860841
    Abstract: Techniques are disclosed relating to a split communications fabric topology. In some embodiments, an apparatus includes a communications fabric structure with multiple fabric units. The fabric units may be configured to arbitrate among control packets of different messages. In some embodiments, a processing element is configured to generate a message that includes a control packet and one or more data packets. In some embodiments, the processing element is configured to transmit the control packet to a destination processing element (e.g., a memory controller) via the communications fabric structure and transmit the data packets to a data buffer. In some embodiments, the destination processing element is configured to retrieve the data packets from the data buffer in response to receiving the control packet via the hierarchical fabric structure. In these embodiments, bypassing the fabric structure for data packets may reduce power consumption.
    Type: Grant
    Filed: August 20, 2015
    Date of Patent: January 2, 2018
    Assignee: Apple Inc.
    Inventors: Munetoshi Fukami, Srinivasa R. Sridharan, Harshavardhan Kaushikkar
  • Publication number: 20170055218
    Abstract: Techniques are disclosed relating to a split communications fabric topology. In some embodiments, an apparatus includes a communications fabric structure with multiple fabric units. The fabric units may be configured to arbitrate among control packets of different messages. In some embodiments, a processing element is configured to generate a message that includes a control packet and one or more data packets. In some embodiments, the processing element is configured to transmit the control packet to a destination processing element (e.g., a memory controller) via the communications fabric structure and transmit the data packets to a data buffer. In some embodiments, the destination processing element is configured to retrieve the data packets from the data buffer in response to receiving the control packet via the hierarchical fabric structure. In these embodiments, bypassing the fabric structure for data packets may reduce power consumption.
    Type: Application
    Filed: August 20, 2015
    Publication date: February 23, 2017
    Inventors: Munetoshi Fukami, Srinivasa R. Sridharan, Harshavardhan Kaushikkar