Patents by Inventor Srinivasa Somayazulu
Srinivasa Somayazulu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
-
Publication number: 20240071039Abstract: Methods and apparatus are disclosed herein for computation and compression efficiency in distributed video analytics. Example apparatus disclosed herein are to identify a key frame and a non-key frame in a video frame sequence input to a neural network at a client server, determine motion information between the key frame and the non-key frame based on optical flow, and determine a frame feature representation based on the motion information reconstructed at an edge server, the motion information including feature warping residual errors.Type: ApplicationFiled: September 29, 2023Publication date: February 29, 2024Inventors: Nagabhushan Eswara, Jaroslaw J. Sydir, Vallabhajosyula Srinivasa Somayazulu, Nilesh Ahuja, Omesh Tickoo, Parual Datta
-
Publication number: 20230360307Abstract: One embodiment provides a graphics processor comprising a block of execution resources, a cache memory, a cache memory prefetcher, and circuitry including a programmable neural network unit, the programmable neural network unit comprising a network hardware block including circuitry to perform neural network operations and activation operations for a layer of a neural network, the programmable neural network unit addressable by cores within the block of graphics cores and the neural network hardware block configured to perform operations associated with a neural network configured to determine a prefetch pattern for the cache memory prefetcher.Type: ApplicationFiled: May 1, 2023Publication date: November 9, 2023Applicant: Intel CorporationInventors: HUGUES LABBE, DARREL PALKE, SHERINE ABDELHAK, JILL BOYCE, VARGHESE GEORGE, SCOTT JANUS, ADAM LAKE, ZHIJUN LEI, ZHENGMIN LI, MIKE MACPHERSON, CARL MARSHALL, SELVAKUMAR PANNEER, PRASOONKUMAR SURTI, KARTHIK VEERAMANI, DEEPAK VEMBAR, VALLABHAJOSYULA SRINIVASA SOMAYAZULU
-
Patent number: 11676322Abstract: One embodiment provides for a graphics processor comprising a block of graphics compute units, a graphics processor pipeline coupled to the block of graphics compute units, and a programmable neural network unit including one or more neural network hardware blocks. The programmable neural network unit is coupled with the block of graphics compute units and the graphics processor pipeline. The one or more neural network hardware blocks include hardware to perform neural network operations and activation operations for a layer of a neural network. The programmable neural network unit can configure settings of one or more hardware blocks within the graphics processor pipeline based on a machine learning model trained to optimize performance of a set of workloads.Type: GrantFiled: October 13, 2021Date of Patent: June 13, 2023Assignee: Intel CorporationInventors: Hugues Labbe, Darrel Palke, Sherine Abdelhak, Jill Boyce, Varghese George, Scott Janus, Adam Lake, Zhijun Lei, Zhengmin Li, Mike Macpherson, Carl Marshall, Selvakumar Panneer, Prasoonkumar Surti, Karthik Veeramani, Deepak Vembar, Vallabhajosyula Srinivasa Somayazulu
-
Patent number: 11277160Abstract: Technologies for dynamic wireless noise mitigation include a computing device having a wireless modem and one or more antennas. The computing device activates one or more components of the computing device, monitors platform activity, and measures wireless noise received by the antennas. The computing device trains a noise prediction model based on the platform activity and the measured noise. The computing device may monitor platform activity and predict a noise prediction with the noise prediction model based on the monitored activity. The computing device may mitigate wireless noise received by the wireless antennas based on the noise prediction. The computing device may provide the noise prediction to the wireless modem. Other embodiments are described and claimed.Type: GrantFiled: April 6, 2020Date of Patent: March 15, 2022Assignee: Intel CorporationInventors: Shahrnaz Azizi, Vinod Kristem, Jie Gao, Eduardo Alban, Kae-an Liu, Janardhan Koratikere Narayan, Xintian Lin, Ulun Karacaoglu, Atsuo Kuwahara, Timothy F. Cox, Vallabhajosyula Srinivasa Somayazulu, Maruti Gupta Hyde
-
Publication number: 20220058853Abstract: One embodiment provides for a graphics processor comprising a block of graphics compute units, a graphics processor pipeline coupled to the block of graphics compute units, and a programmable neural network unit including one or more neural network hardware blocks. The programmable neural network unit is coupled with the block of graphics compute units and the graphics processor pipeline. The one or more neural network hardware blocks include hardware to perform neural network operations and activation operations for a layer of a neural network. The programmable neural network unit can configure settings of one or more hardware blocks within the graphics processor pipeline based on a machine learning model trained to optimize performance of a set of workloads.Type: ApplicationFiled: October 13, 2021Publication date: February 24, 2022Applicant: Intel CorporationInventors: HUGUES LABBE, DARREL PALKE, SHERINE ABDELHAK, JILL BOYCE, VARGHESE GEORGE, SCOTT JANUS, ADAM LAKE, ZHIJUN LEI, ZHENGMIN LI, MIKE MACPHERSON, CARL MARSHALL, SELVAKUMAR PANNEER, PRASOONKUMAR SURTI, KARTHIK VEERAMANI, DEEPAK VEMBAR, VALLABHAJOSYULA SRINIVASA SOMAYAZULU
-
Patent number: 11151769Abstract: One embodiment provides for a graphics processor comprising a block of graphics compute units, a graphics processor pipeline coupled to the block of graphics compute units, and a programmable neural network unit including one or more neural network hardware blocks. The programmable neural network unit is coupled with the block of graphics compute units and the graphics processor pipeline. The one or more neural network hardware blocks include hardware to perform neural network operations and activation operations for a layer of a neural network. The programmable neural network unit can configure settings of one or more hardware blocks within the graphics processor pipeline based on a machine learning model trained to optimize performance of a set of workloads.Type: GrantFiled: August 9, 2019Date of Patent: October 19, 2021Assignee: Intel CorporationInventors: Hugues Labbe, Darrel Palke, Sherine Abdelhak, Jill Boyce, Varghese George, Scott Janus, Adam Lake, Zhijun Lei, Zhengmin Li, Mike Macpherson, Carl Marshall, Selvakumar Panneer, Prasoonkumar Surti, Karthik Veeramani, Deepak Vembar, Vallabhajosyula Srinivasa Somayazulu
-
Publication number: 20200235765Abstract: Technologies for dynamic wireless noise mitigation include a computing device having a wireless modem and one or more antennas. The computing device activates one or more components of the computing device, monitors platform activity, and measures wireless noise received by the antennas. The computing device trains a noise prediction model based on the platform activity and the measured noise. The computing device may monitor platform activity and predict a noise prediction with the noise prediction model based on the monitored activity. The computing device may mitigate wireless noise received by the wireless antennas based on the noise prediction. The computing device may provide the noise prediction to the wireless modem. Other embodiments are described and claimed.Type: ApplicationFiled: April 6, 2020Publication date: July 23, 2020Inventors: Shahrnaz Azizi, Vinod Kristem, Jie Gao, Eduardo Alban, Kae-an Liu, Janardhan Koratikere Narayan, Xintian Lin, Ulun Karacaoglu, Atsuo Kuwahara, Timothy F. Cox, Vallabhajosyula Srinivasa Somayazulu, Maruti Gupta Hyde
-
Publication number: 20200051309Abstract: One embodiment provides for a graphics processor comprising a block of graphics compute units, a graphics processor pipeline coupled to the block of graphics compute units, and a programmable neural network unit including one or more neural network hardware blocks. The programmable neural network unit is coupled with the block of graphics compute units and the graphics processor pipeline. The one or more neural network hardware blocks include hardware to perform neural network operations and activation operations for a layer of a neural network. The programmable neural network unit can configure settings of one or more hardware blocks within the graphics processor pipeline based on a machine learning model trained to optimize performance of a set of workloads.Type: ApplicationFiled: August 9, 2019Publication date: February 13, 2020Applicant: Intel CorporationInventors: HUGUES LABBE, DARREL PALKE, SHERINE ABDELHAK, JILL BOYCE, VARGHESE GEORGE, SCOTT JANUS, ADAM LAKE, ZHIJUN LEI, ZHENGMIN LI, MIKE MACPHERSON, CARL MARSHALL, SELVAKUMAR PANNEER, PRASOONKUMAR SURTI, KARTHIK VEERAMANI, DEEPAK VEMBAR, VALLABHAJOSYULA SRINIVASA SOMAYAZULU
-
Patent number: 10015797Abstract: Some demonstrative embodiments include devices, systems of selectively providing Internet Protocol (IP) session continuity. In one example, a mobile device may include a radio to communicate with a wireless network, the radio to transmit a session setup request to setup a communication session, and to receive a session setup response in response to the session setup request, the session setup response including a first Internet Protocol (IP) address and a second IP address assigned to the communication session, and an indication that the first IP address is configured to maintain IP session continuity; and a controller to select to use the first IP address for the communication session, if IP session continuity is to be maintained for the communication session, and to select to use the second IP address for the communication session, if IP session continuity is not to be maintained for the communication session.Type: GrantFiled: June 27, 2014Date of Patent: July 3, 2018Assignee: INTEL IP CORPORATIONInventors: Danny Moses, Muthaiah Venkatachalam, Hassnaa Moustafa, Meghashree Dattatri Kedalagudde, Wu-Chi Feng, Vallabhajosyula Srinivasa Somayazulu, Alexandre Saso Stojanovski
-
Publication number: 20150029956Abstract: Some demonstrative embodiments include devices, systems of selectively providing Internet Protocol (IP) session continuity. In one example, a mobile device may include a radio to communicate with a wireless network, the radio to transmit a session setup request to setup a communication session, and to receive a session setup response in response to the session setup request, the session setup response including a first Internet Protocol (IP) address and a second IP address assigned to the communication session, and an indication that the first IP address is configured to maintain IP session continuity; and a controller to select to use the first IP address for the communication session, if IP session continuity is to be maintained for the communication session, and to select to use the second IP address for the communication session, if IP session continuity is not to be maintained for the communication session.Type: ApplicationFiled: June 27, 2014Publication date: January 29, 2015Inventors: Danny Moses, Muthaiah Venkatachalam, Hassnaa Moustafa, Meghashree Dattatri Kedalagudde, Wu-Chi Feng, Vallabhajosyula Srinivasa Somayazulu, Alexandre Saso Stojanovski
-
Patent number: 8781447Abstract: Techniques are described to transmit multimedia content to a mobile station using a combination of a mobile/cellular network as well as a TV Whitespace (TVWS) network. Scalable video coding can be used to transmit a baseline layer of multi-media content using the mobile/cellular network and one or more enhancement layers over the TVWS channels. Joint source-channel coding can be used to adjust the transmission scheme used by mobile/cellular and/or TVWS based on end user experience.Type: GrantFiled: September 24, 2010Date of Patent: July 15, 2014Assignee: Intel CorporationInventors: Barry A. O'Mahony, Jeffrey R. Foerster, V. Srinivasa Somayazulu, Ozgur Oyman
-
Patent number: 8401563Abstract: Embodiments of the present invention provide for downlink resource allocation among a plurality of users. Other embodiments may be described and claimed.Type: GrantFiled: September 16, 2011Date of Patent: March 19, 2013Assignee: Intel CorporationInventors: Qinghua Li, Xintain E. Lin, V. Srinivasa Somayazulu, Minnie Ho
-
Publication number: 20120077466Abstract: Techniques are described to transmit multimedia content to a mobile station using a combination of a mobile/cellular network as well as a TV Whitespace (TVWS) network. Scalable video coding can be used to transmit a baseline layer of multi-media content using the mobile/cellular network and one or more enhancement layers over the TVWS channels. Joint source-channel coding can be used to adjust the transmission scheme used by mobile/cellular and/or TVWS based on end user experience.Type: ApplicationFiled: September 24, 2010Publication date: March 29, 2012Inventors: Barry A. O'Mahony, Jeffrey R. Foerster, V. Srinivasa Somayazulu, Ozgur Oyman
-
Publication number: 20120057542Abstract: Embodiments of the present invention provide for downlink resource allocation among a plurality of users. Other embodiments may be described and claimed.Type: ApplicationFiled: September 16, 2011Publication date: March 8, 2012Inventors: Qinghua Li, Xintian E. Lin, V. Srinivasa Somayazulu, Minnie Ho
-
Patent number: 8041362Abstract: Embodiments of the present invention provide for downlink resource allocation among a plurality of users. Other embodiments may be described and claimed.Type: GrantFiled: March 19, 2007Date of Patent: October 18, 2011Assignee: Intel CorporationInventors: Qinghua Li, Xintian E. Lin, V. Srinivasa Somayazulu, Minnie Ho
-
Patent number: 7613223Abstract: Time-frequency coding in a multi-band ultra-wideband system is generally described. In this regard a hopping code agent is presented to select a frequency hopping code for encoding and decoding from a set of predetermined FHC's for communicating with other devices in a multi-band ultra-wideband (MB-UWB) network, wherein the FHC defines a sequence of two or more pulses over two or more frequencies and wherein the FHC's include a time slot that contains no transmission. Other embodiments are also disclosed and claimed.Type: GrantFiled: December 31, 2003Date of Patent: November 3, 2009Assignee: Intel CorporationInventors: Sumit Roy, Jeffrey R. Foerster, V. Srinivasa Somayazulu
-
Patent number: 7532564Abstract: A sub-banded ultra-wideband (SB-UWB) system may combine aspects of an orthogonal frequency division multiplexing (OFDM) modulation scheme with aspects of an ultra-wideband system. In one embodiment, the system may use orthogonal waveforms to form an ultra-wideband wireless communications system. In another embodiment, an FFT based implementation of the system may be used to generate and detect an SB-UWB waveform.Type: GrantFiled: September 11, 2002Date of Patent: May 12, 2009Assignee: Intel CorporationInventors: Jeffrey R. Foerster, Minnie Ho, Srinivasa Somayazulu, Keith R. Tinsley
-
Patent number: 6977972Abstract: The performance of forward error correction decoders for digital communication systems can be improved if soft information relating the reliability of the value representing the demodulated signal is provided to the decoder with a value for the signal. On the other hand, soft information increases the quantity of information that must be processed, increasing the cost and complexity of the decoder.Type: GrantFiled: July 12, 2000Date of Patent: December 20, 2005Assignee: Sharp Laboratories of America, Inc.Inventors: Srinivas Kandala, V. Srinivasa Somayazulu, Chan K. Park
-
Patent number: 6882679Abstract: In a direct sequence spread spectrum data communication system an information bit is mixed with a pseudorandom noise or spreading code to produce modulated codeword for transmission. A method of bandwidth efficient M-ary phase shift key modulation encoding at least 16 bits of data to a single codeword is disclosed for extending the data rate of a spread spectrum system. Interoperability with legacy devices is maximized by maintaining structural similarity between the modulated waveforms of the extended data rate and legacy systems.Type: GrantFiled: December 29, 2000Date of Patent: April 19, 2005Assignee: Sharp Laboratories of America, Inc.Inventors: V. Srinivasa Somayazulu, Srinivas Kandala, John M. Kowalski, Chan K. Park
-
Patent number: 6882692Abstract: In a direct sequence spread spectrum receiver an “as received” signal is decoded by correlation. Phase shift key, complementary code key modulated signals are correlated by transforming samples of the signal in a series of butterfly transform processors producing a number of correlations equal to the number of possible transmitted codewords. The largest correlation is selected as the transmitted signal. To reduce the number of processors required to transform a multi-level phase shift key signal, a correlation method and apparatus are disclosed wherein the butterfly transforms are modified with additional twiddle factors selected from a set of twiddle factors. In the alternative, the inputs to the butterfly processors of a correlator can be weighted as a function the additional twiddle factors. A set of signal samples is correlated for each combination of the set of additional twiddle factors and the largest correlation selected as the signal.Type: GrantFiled: December 29, 2000Date of Patent: April 19, 2005Assignee: Sharp Laboratories of America, Inc.Inventor: V. Srinivasa Somayazulu