Patents by Inventor Srinivasaraju Dhenuvakonda

Srinivasaraju Dhenuvakonda has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • FREQUENCY COMPENSATION FOR LINEAR REGULATORS
    Publication number: 20180095488
    Abstract: A linear voltage regulator and associated integrated circuit and method are disclosed. The linear voltage regulator is operable within a plurality of predefined operational modes, and comprises a pass element configured to generate an output voltage based on a received input voltage. The linear voltage regulator further comprises an error amplifier comprising an output node coupled with a control node of the pass element. The error amplifier is configured to generate a control signal at the output node based on the output voltage and a reference voltage. The linear voltage regulator further comprises a frequency compensation circuit configured to selectively apply an impedance to the output node based on which of the predefined operational modes is selected.
    Type: Application
    Filed: September 30, 2016
    Publication date: April 5, 2018
    Inventors: Aswani TADINADA, Sivan Kumar PANDIAN, Kaushalendra TRIPATHI, Srinivasaraju DHENUVAKONDA
  • Frequency compensation for linear regulators
    Patent number: 9933800
    Abstract: A linear voltage regulator and associated integrated circuit and method are disclosed. The linear voltage regulator is operable within a plurality of predefined operational modes, and comprises a pass element configured to generate an output voltage based on a received input voltage. The linear voltage regulator further comprises an error amplifier comprising an output node coupled with a control node of the pass element. The error amplifier is configured to generate a control signal at the output node based on the output voltage and a reference voltage. The linear voltage regulator further comprises a frequency compensation circuit configured to selectively apply an impedance to the output node based on which of the predefined operational modes is selected.
    Type: Grant
    Filed: September 30, 2016
    Date of Patent: April 3, 2018
    Assignee: SYNAPTICS INCORPORATED
    Inventors: Aswani Tadinada, Sivan Kumar Pandian, Kaushalendra Tripathi, Srinivasaraju Dhenuvakonda