Patents by Inventor Sriram Srinivasan
Sriram Srinivasan has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20240145395Abstract: Embodiments disclosed herein include electronic packages. In an embodiment, the electronic package comprises, a package substrate, an interposer on the package substrate, a first die cube and a second die cube on the interposer, wherein the interposer includes conductive traces for electrically coupling the first die cube to the second die cube, a die on the package substrate, and an embedded multi-die interconnect bridge (EMIB) in the package substrate, wherein the EMIB electrically couples the interposer to the die.Type: ApplicationFiled: January 5, 2024Publication date: May 2, 2024Inventors: MD Altaf HOSSAIN, Ankireddy NALAMALPU, Dheeraj SUBBAREDDY, Robert SANKMAN, Ravindranath V. MAHAJAN, Debendra MALLIK, Ram S. VISWANATH, Sandeep B. SANE, Sriram SRINIVASAN, Rajat AGARWAL, Aravind DASU, Scott WEBER, Ravi GUTALA
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Patent number: 11954506Abstract: In an approach for visualizing metrics towards optimizing application performance, a processor identifies an application, running in a user interface, on a cloud platform. A processor calculates information metrics of the application. A processor presents the information metrics on the user interface with the application.Type: GrantFiled: March 29, 2021Date of Patent: April 9, 2024Assignee: International Business Machines CorporationInventors: Ankit Jha, Sundari Voruganti, Lalit Somavarapha, Vikram Sri Nitesh Tantravahi, Sriram Srinivasan
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Publication number: 20240111503Abstract: Systems and methods for transforming data for a batch-based legacy software program into data suitable for processing by a streaming-based new software program. In some aspects, the system generates an information stream for multiple threads from batch information received from the legacy software program. The system processes the information stream for the multiple threads using the new software program. If there is a mismatch between outputs of the legacy and new software programs for at least one thread, the system adjusts a data model of the new software program to address the mismatch and generates an updated information stream for processing by the new software program.Type: ApplicationFiled: September 29, 2022Publication date: April 4, 2024Applicant: Capital One Services, LLCInventors: Komal Krishna PANDAMANETI, Sriram SRINIVASAN, Lavanya RAJA, Sairam KOMMIREDDY, Maria RABINOWITZ, Steven W. BRASKAMP, Steven G. CHIAGOURIS, Jason E. LINES, Arjun DUGAL, Brittany Nicole Geron COURTNEY
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Patent number: 11928060Abstract: A processing system includes a plurality of compute units, with each compute unit having an associated first cache of a plurality of first caches, and a second cache shared by the plurality of compute units. The second cache operates to manage transfers of caches between the first caches of the plurality of first caches such that when multiple candidate first caches contain a valid copy of a requested cacheline, the second cache selects the candidate first cache having the shortest total path from the second cache to the candidate first cache and from the candidate first cache to the compute unit issuing a request for the requested cacheline.Type: GrantFiled: February 8, 2022Date of Patent: March 12, 2024Assignee: Advanced Micro Devices, Inc.Inventors: Sriram Srinivasan, John Kelley, Matthew Schoenwald
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Publication number: 20240054527Abstract: A method for improving accuracy of distributing content from a plurality of publishers to a multiplicity of users while maintaining user privacy is disclosed herein. An example method includes generating a statistical model of presentations of content from the plurality of publishers to the multiplicity of users; determining, using the statistical model for each of the multiplicity of users, one or more user identifiers corresponding to the user, to define a virtual user identifier; determining, using the statistical model and the virtual user identifiers, how many of the multiplicity of users are associated with multiple ones of the plurality of publishers; generating, using an overlap metric, a respective frequency capping value for each of the plurality of publishers; and causing each of the plurality of publishers to limit a number of times a content element is provided to the multiplicity of users in accordance with the respective frequency capping value.Type: ApplicationFiled: November 30, 2021Publication date: February 15, 2024Inventors: Subhakanta Kar, Sriram Srinivasan, Jake Jolly
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Patent number: 11901299Abstract: Embodiments disclosed herein include electronic packages. In an embodiment, the electronic package comprises, a package substrate, an interposer on the package substrate, a first die cube and a second die cube on the interposer, wherein the interposer includes conductive traces for electrically coupling the first die cube to the second die cube, a die on the package substrate, and an embedded multi-die interconnect bridge (EMIB) in the package substrate, wherein the EMIB electrically couples the interposer to the die.Type: GrantFiled: December 12, 2022Date of Patent: February 13, 2024Assignee: Intel CorporationInventors: Md Altaf Hossain, Ankireddy Nalamalpu, Dheeraj Subbareddy, Robert Sankman, Ravindranath V. Mahajan, Debendra Mallik, Ram S. Viswanath, Sandeep B. Sane, Sriram Srinivasan, Rajat Agarwal, Aravind Dasu, Scott Weber, Ravi Gutala
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Publication number: 20240046937Abstract: Innovations in phase quantization during speech encoding and phase reconstruction during speech decoding are described. For example, to encode a set of phase values, a speech encoder omits higher-frequency phase values and/or represents at least some of the phase values as a weighted sum of basis functions. Or, as another example, to decode a set of phase values, a speech decoder reconstructs at least some of the phase values using a weighted sum of basis functions and/or reconstructs lower-frequency phase values then uses at least some of the lower-frequency phase values to synthesize higher-frequency phase values. In many cases, the innovations improve the performance of a speech codec in low bitrate scenarios, even when encoded data is delivered over a network that suffers from insufficient bandwidth or transmission quality problems.Type: ApplicationFiled: October 5, 2023Publication date: February 8, 2024Applicant: Microsoft Technology Licensing, LLCInventors: Soren Skak JENSEN, Sriram SRINIVASAN, Koen Bernard VOS
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Patent number: 11862547Abstract: Embodiments include assemblies. An assembly includes a substrate having a first interconnect and a second interconnect. The first interconnect has a first conductive pad and a second conductive pad, and the second interconnect has a third conductive pad and a fourth conductive pad. The assembly includes a socket over the substrate. The socket has a first pin, a second pin, and a base layer with a first pad and a second pad. The first and second pins are vertically over the respective first and second interconnects. The first pad is directly coupled to the first pin and fourth conductive pad, while the second pad is directly coupled to the second pin and second conductive pad. The first pad is positioned partially within a footprint of the third conductive pad, and the second pad is positioned partially within a footprint of the first conductive pad.Type: GrantFiled: February 28, 2020Date of Patent: January 2, 2024Assignee: Intel CorporationInventors: Zhichao Zhang, Zhe Chen, Srikant Nekkanty, Sriram Srinivasan
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Patent number: 11853111Abstract: Methods and apparatuses control electrical current supplied to a plurality of processing units in a multi-processor system. A plurality of current usage information corresponding to the processing units are received by a controller to determine a threshold current for each of the processing units. The controller determines a frequency reduction action and an instructions-per-cycle (IPC) reduction action for the each of the processing units based on the threshold current and regulates operations of the processing units based on the determined frequency and IPC reduction actions.Type: GrantFiled: September 8, 2022Date of Patent: December 26, 2023Assignee: ADVANCED MICRO DEVICES, INC.Inventors: Amitabh Mehra, Richard Martin Born, Sriram Srinivasan, Sneha Komatireddy, Michael L Golden, Xiuting Kaleen C. Man, Gokul Subramani Ramalingam Lakshmi Devi, Xiaojie He
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Patent number: 11829777Abstract: A method manages microservices. A number of processors identifies configuration information for a set of assemblies. The number of processors configures a set of namespaces in a computer system for the set of assemblies using a first set of permissions needed to set up the set of namespaces using the configuration information. The number of processors installs the set of assemblies using a second set of permissions using the configuration information. The second set of permissions has a lower level than the first set of permissions.Type: GrantFiled: October 28, 2020Date of Patent: November 28, 2023Assignee: International Business Machines CorporationInventors: Kaihua Zhou, Kangda Zhang, Alexander Abrashkevich, Mengdie Chu, Sen Yang, Sriram Srinivasan, Simon Shi
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Patent number: 11817107Abstract: Innovations in phase quantization during speech encoding and phase reconstruction during speech decoding are described. For example, to encode a set of phase values, a speech encoder omits higher-frequency phase values and/or represents at least some of the phase values as a weighted sum of basis functions. Or, as another example, to decode a set of phase values, a speech decoder reconstructs at least some of the phase values using a weighted sum of basis functions and/or reconstructs lower-frequency phase values then uses at least some of the lower-frequency phase values to synthesize higher-frequency phase values. In many cases, the innovations improve the performance of a speech codec in low bitrate scenarios, even when encoded data is delivered over a network that suffers from insufficient bandwidth or transmission quality problems.Type: GrantFiled: July 27, 2022Date of Patent: November 14, 2023Assignee: Microsoft Technology Licensing, LLCInventors: Soren Skak Jensen, Sriram Srinivasan, Koen Bernard Vos
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Publication number: 20230334322Abstract: Apparatus and methods are disclosed for using machine learning models with private and public domains. Operations can be applied to transform input to a machine learning model in a private domain that is kept secret or otherwise made unavailable to third parties. In one example of the disclosed technology, a method includes applying a private transform to produce transformed input, providing the transformed input to a machine learning model that was trained using a training set modified by the private transform, and generating inferences with the machine learning model using the transformed input. Examples of suitable transforms that can be employed include matrix multiplication, time or spatial domain to frequency domains, and partitioning a neural network model such that an input and at least one hidden layer form part of the private domain, while the remaining layers form part of the public domain.Type: ApplicationFiled: June 23, 2023Publication date: October 19, 2023Applicant: Microsoft Technology Licensing, LLCInventors: Sriram Srinivasan, David Yuheng Zhao, Ming-Chieh Lee, Mu Han
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Patent number: 11763157Abstract: Apparatus and methods are disclosed for using machine learning models with private and public domains. Operations can be applied to transform input to a machine learning model in a private domain that is kept secret or otherwise made unavailable to third parties. In one example of the disclosed technology, a method includes applying a private transform to produce transformed input, providing the transformed input to a machine learning model that was trained using a training set modified by the private transform, and generating inferences with the machine learning model using the transformed input. Examples of suitable transforms that can be employed include matrix multiplication, time or spatial domain to frequency domains, and partitioning a neural network model such that an input and at least one hidden layer form part of the private domain, while the remaining layers form part of the public domain.Type: GrantFiled: March 24, 2020Date of Patent: September 19, 2023Assignee: Microsoft Technology Licensing, LLCInventors: Sriram Srinivasan, David Yuheng Zhao, Ming-Chieh Lee, Mu Han
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Publication number: 20230207525Abstract: A packaged device comprises first die stack and a third die. The first die stack includes a first die comprising first conductive contacts each at a first side of the first die, and a second die comprising second conductive contacts each at a second side of the second die. First solder bonds which each extend to a respective one of the first conductive contacts. The third die comprises third conductive contacts each at a third side of the third die. The third die is coupled to the first die stack via second solder bonds which each extend to a respective one of the second conductive contacts, and to a respective one of the third conductive contacts. Each die of the first die stack is coupled to each of a respective one or more other dies of the first die stack via respective hybrid bonds.Type: ApplicationFiled: December 24, 2021Publication date: June 29, 2023Applicant: Intel CorporationInventors: Debendra Mallik, Sriram Srinivasan, Christopher Pelto, Gwang-Soo Kim, Nitin Deshpande, Omkar Karhade
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Patent number: 11676950Abstract: An apparatus is provided which comprises: a plurality of plated through holes; a material with magnetic properties adjacent to the plurality of plated through holes; and one or more conductors orthogonal to a length of the plurality of plated through holes, the one or more conductors to couple one plated through hole of the plurality with another plated through hole of the plurality such that an inductor is formed.Type: GrantFiled: September 28, 2017Date of Patent: June 13, 2023Assignee: Intel CorporationInventors: Krishna Bharath, Sriram Srinivasan, Amruthavalli Alur, Kaladhar Radhakrishnan, Huong Do, William Lambert
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Patent number: 11677620Abstract: Computing systems, for example, multi-tenant systems create data centers in a cloud platform using a cloud platform infrastructure language that is cloud platform independent. The system receives a cloud platform independent declarative specification describing a new datacenter to be created and a customization specification for customizing the data center. The system compiles the declarative specification along with the customization specification to generate a metadata representation of the data center. The metadata representation is used to generate a data center on a target cloud platform. Different customization specifications can be provided to generate different customized datacenters based on the same declarative specification. For example, the different customized data centers may implement different policies, for example, network policies, security policies, and so on.Type: GrantFiled: March 4, 2022Date of Patent: June 13, 2023Assignee: Salesforce, Inc.Inventors: Sriram Srinivasan, Joshua Paul Meier, Varun Gupta, Mayakrishnan Chakkarapani, Neil Natarajan
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Patent number: 11643961Abstract: A process for detecting reductant deposits includes accessing data indicative of signal output from a radiofrequency sensor positioned proximate a decomposition reactor tube; comparing the data indicative of signal output from the radiofrequency sensor to a deposit formation threshold; and activating a deposit mitigation process responsive to the data indicative of signal output from the radiofrequency sensor exceeding the deposit formation threshold.Type: GrantFiled: September 8, 2021Date of Patent: May 9, 2023Assignee: CUMMINS EMISSION SOLUTIONS INC.Inventor: Sriram Srinivasan
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Publication number: 20230138038Abstract: Disclosed in some examples are methods, systems, and machine-readable mediums which determine jitter buffer delay by inputting jitter buffer and currently observed network status information to a machine learned model that is trained using a reinforcement learning (RL) method. The model maps these inputs to an action to compress, stretch, or hold the jitter buffer delay, which is used by a recipient computing device to optimize the jitter buffer delay. The model may be trained using a simulator that uses network traces of past real streaming sessions (e.g., communication sessions) of users. By training the model through reinforcement learning, the model learns to make better decisions through reinforcement in the form of reward signals that reflect the performance of each decision.Type: ApplicationFiled: December 30, 2022Publication date: May 4, 2023Inventors: Xiulian Peng, Vinod Prakash, Xiangyu Kong, Sriram Srinivasan, Yan Lu
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Publication number: 20230107106Abstract: Embodiments disclosed herein include electronic packages. In an embodiment, the electronic package comprises, a package substrate, an interposer on the package substrate, a first die cube and a second die cube on the interposer, wherein the interposer includes conductive traces for electrically coupling the first die cube to the second die cube, a die on the package substrate, and an embedded multi-die interconnect bridge (EMIB) in the package substrate, wherein the EMIB electrically couples the interposer to the die.Type: ApplicationFiled: December 12, 2022Publication date: April 6, 2023Inventors: MD Altaf HOSSAIN, Ankireddy NALAMALPU, Dheeraj SUBBAREDDY, Robert SANKMAN, Ravindranath V. MAHAJAN, Debendra MALLIK, Ram S. VISWANATH, Sandeep B. SANE, Sriram SRINIVASAN, Rajat AGARWAL, Aravind DASU, Scott WEBER, Ravi GUTALA
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Publication number: 20230086691Abstract: Microelectronic assemblies, related devices and methods, are disclosed herein. In some embodiments, a microelectronic assembly may include a microelectronic subassembly including a first bridge component in a first layer, the first bridge component having a first surface and an opposing second surface, and a die in a second layer, wherein the second layer is on the first layer, and the die is electrically coupled to the second surface of the first bridge component; a package substrate having a second bridge component embedded therein, wherein the second bridge component is electrically coupled to the first surface of the first bridge component; and a microelectronic component on the second surface of the package substrate and electrically coupled to the second bridge component, wherein the microelectronic component is electrically coupled to the die via the first and second bridge components.Type: ApplicationFiled: September 23, 2021Publication date: March 23, 2023Applicant: Intel CorporationInventors: Sriram Srinivasan, Sanka Ganesan, Timothy A. Gosselin