Abstract: An equalizer that includes equalizer circuitry, a mean squared error (MSE) system, and adaptive control logic includes features that inhibit undesirable convergence to local minima.

Abstract: A rate-adaptive equalizer automatically initializes its tap coefficients to values. During an initialization process, a linear search algorithm is performed that sweeps the tap coefficients through different combinations of tap coefficients while assessing information about an eye associated with an input signal received over a communications channel. When the eye information indicates that the eye is open, the current tap coefficients are selected as the initial tap coefficients to be used at the beginning of the main adaptation algorithm.

Abstract: A rate-adaptive equalizer automatically initializes its tap coefficients to values. During an initialization process, a linear search algorithm is performed that sweeps the tap coefficients through different combinations of tap coefficients while assessing information about an eye associated with an input signal received over a communications channel. When the eye information indicates that the eye is open, the current tap coefficients are selected as the initial tap coefficients to be used at the beginning of the main adaptation algorithm.

Abstract: An equalizer that includes equalizer circuitry, a mean squared error (MSE) system, and adaptive control logic includes features that inhibit undesirable convergence to local minima.

Abstract: A data stream monitor includes an analog front end (AFE) and a digital state machine. The AFE receives recovered clock and data signals at a first rate. The AFE uses the recovered clock and a phase interpolator to generate a phase-adjusted clock signal at a second rate slower than the first rate. The AFE uses a detector operating with the phase-adjusted clock signal to generate a representation of the data signal generated from comparisons of the data signal with two reference voltages. A logical combination of the results from the comparisons generates a signal that identifies when the data signal voltage is near the common-mode voltage. The digital state machine generates a strobe signal at a third rate slower than the second rate. The strobe signal is used by the AFE to sample the signal. The sample is forwarded to the digital state machine where it is stored.

Abstract: A data stream monitor includes an analog front end (AFE) and a digital state machine. The AFE receives recovered clock and data signals at a first rate. The AFE uses the recovered clock and a phase interpolator to generate a phase-adjusted clock signal at a second rate slower than the first rate. The AFE uses a detector operating with the phase-adjusted clock signal to generate a representation of the data signal generated from comparisons of the data signal with two reference voltages. A logical combination of the results from the comparisons generates a signal that identifies when the data signal voltage is near the common-mode voltage. The digital state machine generates a strobe signal at a third rate slower than the second rate. The strobe signal is used by the AFE to sample the signal. The sample is forwarded to the digital state machine where it is stored.