Patents by Inventor Sruthi Muralidharan

Sruthi Muralidharan has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10096488
    Abstract: The invention provides a method of forming a semiconductor structure, which include: providing an intermediate semiconductor structure having semiconductor substrate, a fin having an EG oxide layer in contact with at least a portion of the fin, and a gate stack disposed over a portion of the fin; forming a silicon nitride layer over portions of the fin that are not located under the gate stack; and after forming the silicon nitride layer, performing one or more ion implantation steps on the intermediate semiconductor structure.
    Type: Grant
    Filed: May 30, 2017
    Date of Patent: October 9, 2018
    Assignee: GLOBALFOUNDRIES INC.
    Inventors: Michael Ganz, Bingwu Liu, Johannes Marinus Van Meer, Sruthi Muralidharan
  • Patent number: 9812336
    Abstract: The invention provides a method of forming a semiconductor structure, which include: providing an intermediate semiconductor structure having semiconductor substrate, a fin having an EG oxide layer in contact with at least a portion of the fin, and a gate stack disposed over a portion of the fin; forming a silicon nitride layer over portions of the fin that are not located under the gate stack; and after forming the silicon nitride layer, performing one or more ion implantation steps on the intermediate semiconductor structure.
    Type: Grant
    Filed: October 21, 2014
    Date of Patent: November 7, 2017
    Assignee: GLOBALFOUNDRIES INC.
    Inventors: Michael Ganz, Bingwu Liu, Johannes Marinus Van Meer, Sruthi Muralidharan
  • Publication number: 20170263733
    Abstract: The invention provides a method of forming a semiconductor structure, which include: providing an intermediate semiconductor structure having semiconductor substrate, a fin having an EG oxide layer in contact with at least a portion of the fin, and a gate stack disposed over a portion of the fin; forming a silicon nitride layer over portions of the fin that are not located under the gate stack; and after forming the silicon nitride layer, performing one or more ion implantation steps on the intermediate semiconductor structure.
    Type: Application
    Filed: May 30, 2017
    Publication date: September 14, 2017
    Applicant: GLOBALFOUNDRIES Inc.
    Inventors: Michael GANZ, Bingwu LIU, Johannes Marinus VAN MEER, Sruthi MURALIDHARAN
  • Patent number: 9508850
    Abstract: Approaches for enabling uniform epitaxial (epi) growth in an epi junction area of a semiconductor device (e.g., a fin field effect transistor device) are provided. Specifically, a semiconductor device is provided including a dummy gate and a set of fin field effect transistors (FinFETs) formed over a substrate; a spacer layer formed over the dummy gate and each of the set of FinFETs; and an epi material formed within a set of recesses in the substrate, the set of recesses formed prior to removal of an epi block layer over the dummy gate.
    Type: Grant
    Filed: February 1, 2016
    Date of Patent: November 29, 2016
    Assignee: GLOBALFOUNDRIES INC.
    Inventors: Zhenyu Hu, Richard J. Carter, Andy Wei, Qi Zhang, Sruthi Muralidharan, Amy L. Child
  • Publication number: 20160163862
    Abstract: Approaches for enabling uniform epitaxial (epi) growth in an epi junction area of a semiconductor device (e.g., a fin field effect transistor device) are provided. Specifically, a semiconductor device is provided including a dummy gate and a set of fin field effect transistors (FinFETs) formed over a substrate; a spacer layer formed over the dummy gate and each of the set of FinFETs; and an epi material formed within a set of recesses in the substrate, the set of recesses formed prior to removal of an epi block layer over the dummy gate.
    Type: Application
    Filed: February 1, 2016
    Publication date: June 9, 2016
    Applicant: GLOBALFOUNDRIES INC.
    Inventors: ZHENYU HU, Richard J. Carter, Andy Wei, Qi Zhang, Sruthi Muralidharan, Amy L. Child
  • Patent number: 9363033
    Abstract: The present invention relates to an optical transmitter for transmitting data. The optical transmitter includes a pulse generator for generating N data streams overlapping in time from a de-multiplexed data source. Each respective data stream has pulses with shapes unique to that respective data stream. The transmitter also includes an optical source optically transmitting an output pulse that is generated by summing the uniquely shaped pulses from each respective data stream that are overlapping in time. Each output pulse represents N bits of the data source, where N>1.
    Type: Grant
    Filed: January 10, 2012
    Date of Patent: June 7, 2016
    Assignee: RENSSELAER POLYTECHNIC INSTITUTE
    Inventors: Partha S. Dutta, Sruthi Muralidharan
  • Patent number: 9293586
    Abstract: Approaches for enabling uniform epitaxial (epi) growth in an epi junction area of a semiconductor device (e.g., a fin field effect transistor device) are provided. Specifically, a semiconductor device is provided including a dummy gate and a set of fin field effect transistors (FinFETs) formed over a substrate; a spacer layer formed over the dummy gate and each of the set of FinFETs; and an epi material formed within a set of recesses in the substrate, the set of recesses formed prior to removal of an epi block layer over the dummy gate.
    Type: Grant
    Filed: July 17, 2013
    Date of Patent: March 22, 2016
    Assignee: GLOBALFOUNDRIES INC.
    Inventors: Zhenyu Hu, Richard J. Carter, Andy Wei, Qi Zhang, Sruthi Muralidharan, Amy L. Child
  • Patent number: 9219002
    Abstract: Approaches for improving overlay performance for an integrated circuit (IC) device are provided. Specifically, the IC device (e.g., a fin field effect transistor (FinFET)) is provided with an oxide layer and a pad layer formed over a substrate, wherein the oxide layer comprises an alignment and overlay mark, an oxide deposited in a set of openings formed through the pad layer and into the substrate, a mandrel layer deposited over the oxide material and the pad layer, and a set of fins patterned in the IC device without etching the alignment and overlay mark. With this approach, the alignment and overlay mark is provided with the fin cut (FC) layer and, therefore, avoids finification.
    Type: Grant
    Filed: September 17, 2013
    Date of Patent: December 22, 2015
    Assignee: GLOBALFOUNDRIES INC.
    Inventors: Zhenyu Hu, Andy Wei, Qi Zhang, Richard J. Carter, Hongliang Shen, Daniel Pham, Sruthi Muralidharan
  • Publication number: 20150200111
    Abstract: Embodiments of the present invention provide improved methods for fabrication of finFETs. During finFET fabrication, a film, such as amorphous silicon, is deposited on a semiconductor substrate which has regions with fins and regions without fins. A fill layer is deposited on the film and planarized to form a flush surface. A recess or etch process is used to form a planar surface with all portions of the fill layer removed. A finishing process such as a gas cluster ion beam process may be used to further smooth the substrate surface. This results in a film having a very uniform thickness across the structure (e.g. a semiconductor wafer), resulting in improved within-wafer (WiW) uniformity and improved within-chip (WiC) uniformity.
    Type: Application
    Filed: January 13, 2014
    Publication date: July 16, 2015
    Applicant: GLOBALFOUNDRIES Inc.
    Inventors: Sruthi Muralidharan, Zhenyu Hu, Qi Zhang, Ja-Hyung Han, Dinesh Koli, Zhuangfei Chen
  • Publication number: 20150115371
    Abstract: The invention provides a method of forming a semiconductor structure, which include: providing an intermediate semiconductor structure having semiconductor substrate, a fin having an EG oxide layer in contact with at least a portion of the fin, and a gate stack disposed over a portion of the fin; forming a silicon nitride layer over portions of the fin that are not located under the gate stack; and after forming the silicon nitride layer, performing one or more ion implantation steps on the intermediate semiconductor structure.
    Type: Application
    Filed: October 21, 2014
    Publication date: April 30, 2015
    Applicant: GLOBALFOUNDRIES Inc.
    Inventors: Michael GANZ, Bingwu LIU, Johannes Marinus VAN MEER, Sruthi MURALIDHARAN
  • Publication number: 20150076653
    Abstract: Approaches for improving overlay performance for an integrated circuit (IC) device are provided. Specifically, the IC device (e.g., a fin field effect transistor (FinFET)) is provided with an oxide layer and a pad layer formed over a substrate, wherein the oxide layer comprises an alignment and overlay mark, an oxide deposited in a set of openings formed through the pad layer and into the substrate, a mandrel layer deposited over the oxide material and the pad layer, and a set of fins patterned in the IC device without etching the alignment and overlay mark. With this approach, the alignment and overlay mark is provided with the fin cut (FC) layer and, therefore, avoids finification.
    Type: Application
    Filed: September 17, 2013
    Publication date: March 19, 2015
    Applicant: GLOBALFOUNDRIES Inc.
    Inventors: Zhenyu Hu, Andy Wei, Qi Zhang, Richard J. Carter, Hongliang Shen, Daniel Pham, Sruthi Muralidharan
  • Publication number: 20150021695
    Abstract: Approaches for enabling uniform epitaxial (epi) growth in an epi junction area of a semiconductor device (e.g., a fin field effect transistor device) are provided. Specifically, a semiconductor device is provided including a dummy gate and a set of fin field effect transistors (FinFETs) formed over a substrate; a spacer layer formed over the dummy gate and each of the set of FinFETs; and an epi material formed within a set of recesses in the substrate, the set of recesses formed prior to removal of an epi block layer over the dummy gate.
    Type: Application
    Filed: July 17, 2013
    Publication date: January 22, 2015
    Inventors: Zhenyu Hu, Richard J. Carter, Andy Wei, Qi Zhang, Sruthi Muralidharan, Amy L. Child
  • Publication number: 20130336659
    Abstract: The present invention relates to an optical transmitter for transmitting data. The optical transmitter includes a pulse generator for generating N data streams overlapping in time from a de-multiplexed data source. Each respective data stream has pulses with shapes unique to that respective data stream. The transmitter also includes an optical source optically transmitting an output pulse that is generated by summing the uniquely shaped pulses from each respective data stream that are overlapping in time. Each output pulse represents N bits of the data source, where N>1.
    Type: Application
    Filed: January 10, 2012
    Publication date: December 19, 2013
    Applicant: RENSSELAER POLYTECHNIC INSTITUTE
    Inventors: Partha S. Dutta, Sruthi Muralidharan