Patents by Inventor Ssu-Chia Huang

Ssu-Chia Huang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Dummy via for reducing proximity effect and method of using the same
    Patent number: 7545045
    Abstract: A dummy via design for a dual damascene structure has a dielectric layer on a substrate, a dual damascene structure filled with a conductive material and inlaid in the dielectric layer, and a dummy via structure filled with a non-conductive material and inlaid in the dielectric layer. The dummy via structure has at least two dummy vias filled with the non-conductive material and located adjacent to two sides of the dual damascene structure respectively.
    Type: Grant
    Filed: March 24, 2005
    Date of Patent: June 9, 2009
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Kun-Cheng Huang, Huan-Chi Tseng, Jhy-Chen You, Kuan-Miao Liu, Tsong-Yuan Chen, Chih-Yang Wang, Tin-Lin Tsai, Ssu-Chia Huang
  • Dummy via for reducing proximity effect and method of using the same
    Publication number: 20060214298
    Abstract: A dummy via design for a dual damascene structure has a dielectric layer on a substrate, a dual damascene structure filled with a conductive material and inlaid in the dielectric layer, and a dummy via structure filled with a non-conductive material and inlaid in the dielectric layer. The dummy via structure has at least two dummy vias filled with the non-conductive material and located adjacent to two sides of the dual damascene structure respectively.
    Type: Application
    Filed: March 24, 2005
    Publication date: September 28, 2006
    Inventors: Kun-Cheng Huang, H. Tseng, Jc You, K. Liu, T. Chen, C. Wang, Tin-Lin Tsai, Ssu-Chia Huang