Patents by Inventor Stéphane PERRIER

Stéphane PERRIER has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Horological movement provided with a generator and a circuit for regulating the frequency of rotation of this generator
    Patent number: 11815857
    Abstract: A horological movement provided with a generator and a circuit for regulating the frequency of rotation of this generator, the regulation circuit being arranged to be able to detect the zero crossings of an induced voltage generated in the stator by the rotating rotor and to generate first braking pulses which are triggered after zero crossings and each end before the induced voltage reaches a peak value, preferably before the rectified induced voltage reaches a power supply voltage provided by a power supply capacity. In addition, the regulation circuit is arranged so as to be able to further generate second braking pulses each of which occurs after detection of the end of a charging period of the power supply capacity during which the induced voltage reaches a peak value and each end before the induced voltage crosses zero.
    Type: Grant
    Filed: November 19, 2021
    Date of Patent: November 14, 2023
    Assignee: The Swatch Group Research and Development Ltd
    Inventors: Jean-Jacques Born, Philippe Sauvain, Stéphane Perrier, Olivier Matthey
  • HOROLOGICAL MOVEMENT PROVIDED WITH A GENERATOR AND A CIRCUIT FOR REGULATING THE FREQUENCY OF ROTATION OF THIS GENERATOR
    Publication number: 20220179361
    Abstract: A horological movement provided with a generator and a circuit for regulating the frequency of rotation of this generator, the regulation circuit being arranged to be able to detect the zero crossings of an induced voltage generated in the stator by the rotating rotor and to generate first braking pulses which are triggered after zero crossings and each end before the induced voltage reaches a peak value, preferably before the rectified induced voltage reaches a power supply voltage provided by a power supply capacity. In addition, the regulation circuit is arranged so as to be able to further generate second braking pulses each of which occurs after detection of the end of a charging period of the power supply capacity during which the induced voltage reaches a peak value and each end before the induced voltage crosses zero.
    Type: Application
    Filed: November 19, 2021
    Publication date: June 9, 2022
    Applicant: The Swatch Group Research and Development Ltd
    Inventors: Jean-Jacques BORN, Philippe SAUVAIN, Stéphane PERRIER, Olivier MATTHEY
  • Method of forming a low quiescent current voltage regulator and structure therefor
    Patent number: 6979984
    Abstract: A voltage regulator (10) is formed to generate a compensation current to flow when an output voltage of the voltage regulator (10) exceeds a compensation value. The compensation current is at least equal to the leakage current of the output transistor (24).
    Type: Grant
    Filed: April 14, 2003
    Date of Patent: December 27, 2005
    Assignee: Semiconductor Components Industries, L.L.C.
    Inventors: Stephane Perrier, Patrick Bernard, Pierre Daude
  • Power management method and structure
    Patent number: 6842068
    Abstract: An multi-stage error amplifier (22) of a power management system (10) is formed to insert a zero to compensate for a high frequency pole that could cause unstable outputs at some output current levels. The error amplifier (22) includes a feed-forward block (40) that isolates the capacitor (36) from other signal paths to facilitate low noise and high efficiency operation.
    Type: Grant
    Filed: February 27, 2003
    Date of Patent: January 11, 2005
    Assignee: Semiconductor Components Industries, L.L.C.
    Inventors: Stephane Perrier, Patrick Bernard, Yves Bernard
  • Method of forming a low quiescent current voltage regulator and structure therefor
    Publication number: 20040201369
    Abstract: A voltage regulator (10) is formed to generate a compensation current to flow when an output voltage of the voltage regulator (10) exceeds a compensation value. The compensation current is at least equal to the leakage current of the output transistor (24).
    Type: Application
    Filed: April 14, 2003
    Publication date: October 14, 2004
    Applicant: Semiconductor Components Industries, LLC.
    Inventors: Stephane Perrier, Patrick Bernard, Pierre Daude
  • Power management method and structure
    Publication number: 20040169550
    Abstract: An multi-stage error amplifier (22) of a power management system (10) is formed to insert a zero to compensate for a high frequency pole that could cause unstable outputs at some output current levels. The error amplifier (22) includes a feed-forward block (40) that isolates the capacitor (36) from other signal paths to facilitate low noise and high efficiency operation.
    Type: Application
    Filed: February 27, 2003
    Publication date: September 2, 2004
    Applicant: Semiconductor Components Industries, LLC.
    Inventors: Stephane Perrier, Patrick Bernard, Yves Bernard