Patents by Inventor Stacy L. Freeman

Stacy L. Freeman has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Interconnection component for facilitating testing of packaged integrated circuits
    Patent number: 6563223
    Abstract: Apparatus and methods of testing and assembling fine ball grid array (FBGA) packages having circuit-bearing interconnect components. In one embodiment, a circuit-bearing interconnect component includes a substrate having a plurality of first conductive members disposed therethrough, a plurality of conductive traces coupled to the first conductive members and extending away from the first conductive members to a distal portion of the substrate, and a plurality of second conductive members disposed on the distal portion and coupled to the conductive traces. The substrate may be rigid or flexible. The first conducting members are located within an engagement area that is adapted to be engageable with a semiconductor component having a plurality of conductive bumps wherein each conductive bump engages one of the first conductive members. The first conductive members may include conductively-plated via or conductive pins.
    Type: Grant
    Filed: December 7, 2001
    Date of Patent: May 13, 2003
    Assignee: Micron Technology, Inc.
    Inventor: Stacy L. Freeman
  • Apparatus and methods of semiconductor packages having circuit-bearing interconnect components
    Patent number: 6562641
    Abstract: Apparatus and methods of testing and assembling fine ball grid array (FBGA) packages having circuit-bearing interconnect components. In one embodiment, a circuit-bearing interconnect component includes a substrate having a plurality of first conductive members disposed therethrough, a plurality of conductive traces coupled to the first conductive members and extending away from the first conductive members to a distal portion of the substrate, and a plurality of second conductive members disposed on the distal portion and coupled to the conductive traces. The substrate may be rigid or flexible. The first conducting members are located within an engagement area that is adapted to be engageable with a semiconductor component having a plurality of conductive bumps wherein each conductive bump engages one of the first conductive members. The first conductive members may include conductively-plated via or conductive pins.
    Type: Grant
    Filed: August 22, 2000
    Date of Patent: May 13, 2003
    Assignee: Micron Technology, Inc.
    Inventor: Stacy L. Freeman
  • Apparatus and methods of semiconductor packages having circuit-bearing interconnect components
    Publication number: 20020050641
    Abstract: Apparatus and methods of testing and assembling fine ball grid array (FBGA) packages having circuit-bearing interconnect components. In one embodiment, a circuit-bearing interconnect component includes a substrate having a plurality of first conductive members disposed therethrough, a plurality of conductive traces coupled to the first conductive members and extending away from the first conductive members to a distal portion of the substrate, and a plurality of second conductive members disposed on the distal portion and coupled to the conductive traces. The substrate may be rigid or flexible. The first conducting members are located within an engagement area that is adapted to be engageable with a semiconductor component having a plurality of conductive bumps wherein each conductive bump engages one of the first conductive members. The first conductive members may include conductively-plated via or conductive pins.
    Type: Application
    Filed: December 7, 2001
    Publication date: May 2, 2002
    Inventor: Stacy L. Freeman