Abstract: An instruction emulation system translates target instructions into emulation instructions for execution by a host processor. A jump table has pointer entries employed to locate, in a translation instruction memory, sets of translating instructions for generating emulation instructions executable by the host for each of the differing types of target instructions. In one embodiment, each of pointer entries in the jump table has an entry length which is no greater than the shortest target instruction length, thereby enabling the jump table to handle target instructions of non-uniform instruction length. For another embodiment in which the target instructions comprise blocks of target instructions, including signal-handling target instructions, the jump table is augmented by a jump table shadow memory which saves memory requirements for code complication. In another embodiment, the jump table memory is partitioned into segments corresponding to the blocks stored in the target instruction memory.

Abstract: A telecommunications exchange comprises a switching device (1201) of a first type through which telecommunications connections are routed. An access unit (1202) connects the switching device to a telecommunications network. The telecommunications exchange includes an exchange main processor (1200) which generates switch control messages for a switching device of a second type but which translates the switch control messages for use by the switching device of the first type. Preferably, the switching device of the second type is a group switch, and the exchange main processor is an open platform processor. The exchange main processor emulates portions of a telecommunications exchange which control the switching device of the first type the emulated portions including a central processor (1234), regional processors, and a switching subsystem (1230).

Abstract: A simulation system (200) executes on a host computer system (110) for simulating a target telecommunications system. The simulation system (200) includes a simulation kernel (231) which contains a plurality of simulation subsystems, each of the simulation subsystems corresponding to subsystems of the target telecommunications system. The simulation kernel (231) is assembled as one executable image with all simulation subsystems executing in one common process context and sharing one common execution thread. The simulation system includes a central processor simulator (234) which simulates execution of target instructions in response to commands entered through a user communication channel to the simulation kernel. The central processor simulator simulates utilization of registers of the central processor of the target telecommunication system. An internal bus of the target telecommunication system is simulated by function calls between the simulation subsystems.