Patents by Inventor Stan Latimer

Stan Latimer has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8624666
    Abstract: In accordance with an embodiment, a noise reduction circuit includes one or more phase sampling circuits that receive an electromagnetic signal and splits the signal into an illuminated component and an ambient component. The illuminated component is transmitted along an illuminated signal path and converted to a digital signal and the ambient component is transmitted along an ambient signal path and converted to a digital signal. The digitized ambient component is subtracted from the digitized illuminated component to generate a light signal with a reduced noise component.
    Type: Grant
    Filed: December 19, 2011
    Date of Patent: January 7, 2014
    Assignee: Semiconductor Components Industries, LLC
    Inventors: Robert B. Smith, Stan Latimer, Morgan Ercanbrack
  • Publication number: 20130154724
    Abstract: In accordance with an embodiment, a noise reduction circuit includes one or more phase sampling circuits that receive an electromagnetic signal and splits the signal into an illuminated component and an ambient component. The illuminated component is transmitted along an illuminated signal path and converted to a digital signal and the ambient component is transmitted along an ambient signal path and converted to a digital signal. The digitized ambient component is subtracted from the digitized illuminated component to generate a light signal with a reduced noise component.
    Type: Application
    Filed: December 19, 2011
    Publication date: June 20, 2013
    Inventors: Robert B. Smith, Stan Latimer, Morgan Ercanbrack
  • Patent number: 6844781
    Abstract: A dual differential-input operational amplifier that includes six PMOSFETs having their source terminals coupled to a high voltage. A seventh and eighth PMOSFET have their source terminals coupled to a current source. Four NMOSFETs have their source terminals coupled to a low voltage. A fifth and sixth NMOSFET have their source terminals coupled to a current sink. The various PMOSFETs and NMOSFETs are coupled together such that the gate terminals of the fifth NMOSFET and eighth PMOSFET receive a first input of the differential input, and such that the gate terminals of the sixth NMOSFET and the seventh PMOSFET receive a second input of the differential input. The operational amplifier may be vertically inverted, or implemented by bipolar transistors, with cascoding devices, and with a second stage in the form of an inverter.
    Type: Grant
    Filed: July 7, 2003
    Date of Patent: January 18, 2005
    Assignee: AMI Semiconductor, Inc.
    Inventors: Joseph Walsh, Stan Latimer