Patents by Inventor Stanislav Soloviev

Stanislav Soloviev has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240154032
    Abstract: An enhanced edge termination structure for use in a charge balanced semiconductor device is provided. The edge termination structure includes a plurality of edge termination trenches and a plurality of semiconductor mesa regions, each of the mesa regions being disposed between adjacent edge termination trenches. The edge termination trenches extend outwardly from an active region of the device on at least two adjacent sides of the active region when viewed in a plan view. The edge termination trenches are orthogonal to a corresponding edge of the active region from which they extend.
    Type: Application
    Filed: October 26, 2023
    Publication date: May 9, 2024
    Inventors: Philip Rutter, Stanislav Soloviev, David Jauregui
  • Publication number: 20240145532
    Abstract: A semiconductor device is provided that includes an epitaxial layer disposed on a semiconductor substrate, the epitaxial layer including an active region, in which at least one active element is formed, and an edge termination region, in which at least one edge termination structure is formed, the edge termination region being laterally adjacent to the active region. The semiconductor device further includes a charged layer disposed on an upper surface of the epitaxial layer, the charged layer covering at least a portion of the active region and extending laterally over at least a portion of the edge termination region. Active trenches may be formed in the active region, and at least one edge trench may be formed in the edge termination region. The charged layer may be formed on sidewalls of each of the active trenches and the edge trench using atomic layer deposition in a same processing step.
    Type: Application
    Filed: September 11, 2023
    Publication date: May 2, 2024
    Inventors: David Jauregui, Stanislav Soloviev, Philip Rutter
  • Publication number: 20170329040
    Abstract: A detector assembly for use in detecting radiation includes a scintillator and a solid state photomultiplier coupled to the scintillator. The detector assembly may include a light guide connected between the scintillator and the solid state photomultiplier. The detector assembly may be used within a receiver in a logging instrument for use downhole. The receiver is configured to detect radiation produced by an emitter or from naturally occurring sources.
    Type: Application
    Filed: May 13, 2016
    Publication date: November 16, 2017
    Applicant: GE Energy Oilfield Technology, Inc.
    Inventors: Helene Claire Climent, Stanislav Soloviev, Sergei Ivanovich Dolinsky
  • Publication number: 20070224784
    Abstract: A semiconductor material having an epitaxial layer formed thereon and methods of forming an epitaxial layer on a semiconductor material are provided. The method includes disposing a masking layer and patterning the masking layer to form openings and growing an epitaxial layer through the openings and over the masking layer where the epitaxial layer is coalescent.
    Type: Application
    Filed: March 22, 2006
    Publication date: September 27, 2007
    Inventors: Stanislav Soloviev, Larry Rowland, Stephen Arthur
  • Patent number: 7061021
    Abstract: This invention is directed to a system and method of fabricating PN and PiN diodes by diffusing an acceptor impurity into a substrate. This invention is particularly advantageous for fabricating SiC diodes having linearly graded, deep pn junctions. One method that this invention uses to achieve its advantages is by diffusing an acceptor impurity into a substrate using a crucible, acceptor source, substrate, and furnace.
    Type: Grant
    Filed: May 3, 2004
    Date of Patent: June 13, 2006
    Assignee: The University of South Carolina
    Inventors: Tangali S. Sudarshan, Stanislav Soloviev, Ying Gao
  • Publication number: 20050184296
    Abstract: This invention is directed to a system and method of fabricating PN and PiN diodes by diffusing an acceptor impurity into a substrate. This invention is particularly advantageous for fabricating SiC diodes having linearly graded, deep pn junctions. One method that this invention uses to achieve its advantages is by diffusing an acceptor impurity into a substrate using a crucible, acceptor source, substrate, and furnace.
    Type: Application
    Filed: April 21, 2005
    Publication date: August 25, 2005
    Inventors: T.S. Sudarshan, Stanislav Soloviev, Ying Gao
  • Publication number: 20040217457
    Abstract: This invention is directed to a system and method of fabricating PN and PiN diodes by diffusing an acceptor impurity into a substrate. This invention is particularly advantageous for fabricating SiC diodes having linearly graded, deep pn junctions. One method that this invention uses to achieve its advantages is by diffusing an acceptor impurity into a substrate using a crucible, acceptor source, substrate, and furnace.
    Type: Application
    Filed: May 3, 2004
    Publication date: November 4, 2004
    Inventors: T. S. Sudarshan, Stanislav Soloviev, Ying Gao