Abstract: The problem of charge leakage in the AC compensation filter for the error amplifier of a pulse width modulation (PWM)-based DC—DC converter is effectively obviated by controllably sampling and storing the voltage across the AC compensation filter, in response to a transition of the operation of a DC power supply from run or active mode to quiescent or sleep mode. The sampled voltage is retained as a compensation voltage throughout the quiescent mode, so that it will be immediately available to the PWM circuitry at the termination of the quiescent interval. This serves to ensure a relatively smooth (low noise) power supply switch-over during a subsequent transition from quiescent to active mode.

Abstract: A sign bit integrator and method for generating a signal to correct an offset in a signal processing system that can distort the output from the system. A charge pulse is generated when the sign of a input signal is sampled in order to provide an offset correction signal with a polarity opposite that of offsets in the system. The charge pulse is provided to a pair of transistors whose size ratio sets the magnitude of the charge pulse. The polarity of the charge pulse is set responsive to a sign bit in the input signal. An integrator capacitor provides the offset correction signal to the signal processing system. A third transistor may be switchably substituted for one of the pair of transistors to change the ratio of sizes and thus change the magnitude of the charge pulse to thereby change the speed with which the offset correction is made. The sign bit integrator and method may be used to correct distortion in a voice signal in a telephone system.

Abstract: A differential voltage monitor is shown using a resistive bridge to produce a sample value representing that differential voltage. A portion of the resistive bridge is located on an IC and a portion is external to the IC. The object is to compare the differential voltage with a reference, producing a logic signal at a threshold level. The threshold level serving as a reference and the sample valve representing the differential voltage are made to be equally dependent on the bridge components located on the IC. In this way, any changes in the IC located bridge resistors compared to the bridge resistors located outside the IC are prevented from affecting the measurement.

Abstract: There is disclosed a high-speed decoding apparatus for use in a flash-type analog-to-digital converter. The apparatus disclosed employs an OR gate which follows an AND gate which AND gate is conventionally employed in a comparator associated with such a converter. The OR gate functions to block any dynamic movement of the unknown input voltage from being transferred to the decode lines of the analog-to-digital converter. To further gain speed, autozeroed inverters are coupled to the output of the OR gate to further assure that the decoder lines are rapidly driven to therefore gain an extra advantage in high-speed operation of the converter employing the apparatus as described.