Abstract: Dynamic redundancy buffers for use with a device are disclosed. The dynamic redundancy buffers allow a memory array of the device to be operated with high write error rate (WER). A first level redundancy buffer (e1 buffer) is couple to the memory array. The e1 buffer may store data words that have failed verification or have not been verified. The e1 buffer may transfer data words to another dynamic redundancy buffer (e2 buffer). The e1 buffer may transfer data words that have failed to write to a memory array after a predetermined number of re-write attempts. The e1 buffer may also transfer data words upon power down.

Abstract: Dynamic redundancy buffers for use with a device are disclosed. The dynamic redundancy buffers allow a memory array of the device to be operated with high write error rate (WER). A first level redundancy buffer (e1 buffer) is couple to the memory array. The e1 buffer may store data words that have failed verification or have not been verified. The e1 buffer may transfer data words to another dynamic redundancy buffer (e2 buffer). The e1 buffer may transfer data words that have failed to write to a memory array after a predetermined number of re-write attempts. The e1 buffer may also transfer data words upon power down.

Abstract: Dynamic redundancy registers for use with a device are disclosed. The dynamic redundancy registers allow a memory bank of the device to be operated with high write error rate (WER). A first level redundancy register (e1 register) is couple to the memory bank. The e1 register may store data words that have failed verification or have not been verified. The e1 register may transfer data words to another dynamic redundancy register (e2 register). The e1 register may transfer data words that have failed to write to a memory bank after a predetermined number of re-write attempts. The e1 register may also transfer data words upon power down.

Abstract: A nonvolatile error buffer is added to STT-MRAM memory design to reduce the error correction coding ECC required to achieve reliable operation with a non-zero Write Error Rate (“WER”). The error buffer is fully associative, storing both the address and the data of memory words which have failed to write correctly within an assigned ECC error budget. The write cycle includes a verify to determine if the word has been written correctly. The read cycle includes a search of the error buffer to determine if the address is present in the buffer.

Abstract: Dynamic redundancy buffers for use with a device are disclosed. The dynamic redundancy buffers allow a memory array of the device to be operated with high write error rate (WER). A first level redundancy buffer (e1 buffer) is couple to the memory array. The e1 buffer may store data words that have failed verification or have not been verified. The e1 buffer may transfer data words to another dynamic redundancy buffer (e2 buffer). The e1 buffer may transfer data words that have failed to write to a memory array after a predetermined number of re-write attempts. The e1 buffer may also transfer data words upon power down.

Abstract: Dynamic redundancy buffers for use with a device are disclosed. The dynamic redundancy buffers allow a memory array of the device to be operated with high write error rate (WER). A first level redundancy buffer (e1 buffer) is couple to the memory array. The e1 buffer may store data words that have failed verification or have not been verified. The e1 buffer may transfer data words to another dynamic redundancy buffer (e2 buffer). The e1 buffer may transfer data words that have failed to write to a memory array after a predetermined number of re-write attempts. The e1 buffer may also transfer data words upon power down.

Abstract: Dynamic redundancy registers for use with a device are disclosed. The dynamic redundancy registers allow a memory bank of the device to be operated with high write error rate (WER). A first level redundancy register (e1 register) is couple to the memory bank. The e1 register may store data words that have failed verification or have not been verified. The e1 register may transfer data words to another dynamic redundancy register (e2 register). The e1 register may transfer data words that have failed to write to a memory bank after a predetermined number of re-write attempts. The e1 register may also transfer data words upon power down.

Abstract: The present invention relates to a method and system for offering mandatorily convertible securities (e.g., DECS) with associated forward purchase contracts and call options. Each mandatorily convertible security combines a forward purchase contract, a mandatory portable remarketable security, and a call option to form a single investment unit. The call option provides additional capital to the issuer of the investment unit and profits to the remarketing agent handling the mandatory portable remarketable security.

Abstract: The present invention relates to a method and system for offering mandatorily convertible securities (e.g., DECS) with associated forward purchase contracts and call options. Each mandatorily convertible security combines a forward purchase contract, a mandatory portable remarketable security, and a call option to form a single investment unit. The call option provides additional capital to the issuer of the investment unit and profits to the remarketing agent handling the mandatory portable remarketable security.

Abstract: A system and method for issuing letters of credit. The system and method issue a first letter of credit from a second party to a third party, and issue at least one second letter of credit from the third party to at least one fourth party. The system and method also provide a credit facility from the second party to a first party, the credit facility associated with the first and second letters of credit. The system and method also transfer credit risk from the credit facility to at least one fifth party under a participation agreement.

Abstract: Securities, methods for raising capital using such securities, and systems for managing such securities are provided. The securities provide protection in bankruptcy to investors for a portion of deferred distributions earned by the investor on the security. The security may also provide a call protection period with limitations on capital replacement, and optional and/or mandatory deferral of distributions.

Abstract: A system and method for issuing letters of credit. The system and method issue a first letter of credit from a second party to a third party, and issue at least one second letter of credit from the third party to at least one fourth party. The system and method also provide a credit facility from the second party to a first party, the credit facility associated with the first and second letters of credit. The system and method also transfer credit risk from the credit facility to at least one fifth party under a participation agreement.

Abstract: A plasma display filter includes five metallic layers, such as silver alloy layers, having a combined thickness that exceeds 50 nm. The metallic layers form an alternating pattern with dielectric layers, where the layer in the pattern closest to a supporting substrate is the first of the dielectric layers. Layer thicknesses are selected to achieve a low reflected color shift with changes in the viewing angle, relatively neutral transmitted color properties, and desirable shielding characteristics with respect to infrared and electromagnetic radiation.