Abstract: A computer system for transmitting packets includes a manager and scheduling elements for managing the transmission of the packets over one or more logical channels. The computer system can prioritize the transmission of packets based on the type of traffic and maintain quality of service (QoS) characteristics associated with a logical channel. In addition, the computer system can execute a threading process to ensure the efficient and timely transmission of certain types of packets without using any complex mathematical operations.

Abstract: A network infrastructure comprises a number of connective devices (routers, repeaters, bridges, etc.) to form a communication network for a plurality of end nodes. Message packets originating with an end node are assigned an input virtual network and workgroup identification at the port at which the packet enters the network. This assigned input virtual network and workgroup identification is compared, at each port from which the packet can exit the network infrastructure, with output virtual network and workgroup identification assigned the particular port. If the input virtual network information does not match the output virtual network information, the packet is prohibited from exiting that port. Even if there is a match between the input and output virtual network information, there must also be a match between at least one bit of the input workgroup identification and the output workgroup identification before the packet can exit the port.

Abstract: A data stream is received by a first in a series of repeating devices and retransmitted from repeating device to repeating device. As the data stream is retransmitted, the data stream accumulates jitter. A jitter reduction apparatus therefore is used after a series of repeating devices to substantially reduce the accumulated jitter. The jitter reduction apparatus receives the data stream, stores the recognized data, then retransmits the data using a recovered clock signal. According to one embodiment, the recovered clock signal is the clock signal of the original data transmission. According to another embodiment, the recovered clock signal is derived from the data stream as input to the first of the series of repeating devices. Such derived clock signal serves as an estimate of the original data source clock signal. By using a recovered clock signal (e.g.

Abstract: An AC motor drive includes a power converter which supplies current to a DC bus from three-phase power lines. An inverter drives the motor from power delivered to the DC bus and it regenerates power to the DC bus when the motor is decelerated. The power converter in turn regenerates the power to the power lines by controlling line current such that it is substantially in-phase with the applied line voltages. Current overload protection is provided for the transistor switches employed in the power converter bridge circuit.