Abstract: A frame assembly has a surface bearing element which comprises at least one glass pane. A plastic profile frame (1, 2) encloses the end face of the surface bearing element. For strengthening purposes, the plastic profile frame (1, 2) has reinforcing components (7, 14, 19, 26, 35) of fibre-reinforced plastic. A receiving portion (3) is provided as an enclosing edge portion of the surface bearing element. The reinforcing components (7, 14, 19, 26, 35) of fibre-reinforced plastic are boundary walls of internal hollow spaces (9-11, 16-18, 21-23, 28-30, 37, 38) which, together with non-reinforced boundary walls, bound the internal hollow spaces. The profile frame (1, 2) is embodied as a coextrudate of the reinforcing components (7, 14, 19, 26, 35) and the non-reinforced boundary walls (4, 5, 6, 12, 13, 25, 31, 32, 33, 34). This results in a frame assembly which can be produced using mass production techniques with minimal use of fibre-reinforced plastic material.

Abstract: The invention relates to a method for producing a layer arrangement. An electrically conductive layer is formed and patterned. A sacrificial layer formed on at least part of the patterned electrically conductive layer. An electrically insulating layer is formed on the electrically conductive and sacrificial layers and is patterned in such a manner that one or more surface areas of the sacrificial layer are exposed. The exposed areas of the sacrificial layer are removed to expose one or more surface areas of the patterned electrically conductive layer. The patterned electrically conductive layer is covered with a pattern of electrically conductive material.

Abstract: One or more embodiments are related to a semiconductor device, comprising: a metallic layer having a top surface and a sidewall surface; an intermediate layer disposed on a sidewall surface of the metallic layer; a dielectric layer disposed over the metallic layer, the dielectric layer having an opening formed therethrough; and a conductive material disposed within the opening, the conductive material at least partially overlying the top surface of the metallic layer, the conductive material being electrically coupled to the metallic layer.

Abstract: The invention relates to a method for producing a layer arrangement. An electrically conductive layer is formed and patterned. A sacrificial layer formed on at least part of the patterned electrically conductive layer. An electrically insulating layer is formed on the electrically conductive and sacrificial layers and is patterned in such a manner that one or more surface areas of the sacrificial layer are exposed. The exposed areas of the sacrificial layer are removed to expose one or more surface areas of the patterned electrically conductive layer. The patterned electrically conductive layer is covered with a pattern of electrically conductive material.

Abstract: A semiconductor device (10) includes a semiconductor component integrated in a semiconductor substrate and a conductive pad (110) arranged on top of the semiconductor device (10). The conductive pad is electrically connected with the semiconductor component. The pad is arranged for connecting the semiconductor device (10) externally. A dielectric material (310) is positioned between the conductive pad (110) and a buried conductive layer (20) of the semiconductor device. The dielectric material (310) comprises a stress blocking structure.