Abstract: A filter circuit arrangement comprising a circuit configuration having non-linear transmission characteristics for equalizing an input signal is disclosed. In one embodiment, the circuit configuration having the non-linear transmission characteristics is provided in a feedback loop of the filter circuit arrangement.

Abstract: The invention relates to a procedure and a circuit device for the subtraction of electrical signals, with at least two regulating loops each comprising at least one amplifier unit. Advantageously, the circuit device comprises a device for subtracting a signal, made available by the circuit device and representing the difference between the electrical signals, from one of the electrical signals. In a preferred embodiment of the invention, the potentials on lines carrying the electrical signals are maintained at the same value with the help of a first one or of the regulating loops.

Abstract: A log circuit receives an operated current signal and a reference current signal at respective inputs and comprises an operand log circuit including a first bipolar semiconductor device and being configured to generate a first logarithmized signal on the basis of the operand current signal, a reference log circuit including a second bipolar semiconductor device and being configured to generate a second logarithmized signal on the basis of the reference current signal, and a differential-amplifier circuit receiving the first logarithmized signal and the second logarithmized signal, and outputting a differential-amplifier output signal in dependency on the first logarithmized signal and the second logarithmized signal.

Abstract: A filter circuit array is disclosed. In one embodiment, the filter circuit array includes a higher-order filter circuit array, wherein one energy storage per order of filter is provided. The transfer function of the filter circuit array has a zero formed by a first energy storage, in particular capacitor, and a double pole formed by two additional energy storages, in particular capacitors.

Abstract: A filter circuit arrangement comprising a circuit configuration having non-linear transmission characteristics for equalizing an input signal is disclosed. In one embodiment, the circuit configuration having the non-linear transmission characteristics is provided in a feedback loop of the filter circuit arrangement.

Abstract: A filter circuit array is disclosed. In one embodiment, the filter circuit array includes a higher-order filter circuit array, wherein one energy storage per order of filter is provided. The transfer function of the filter circuit array has a zero formed by a first energy storage, in particular capacitor, and a double pole formed by two additional energy storages, in particular capacitors.

Abstract: The invention relates to a procedure and a circuit device for the subtraction of electrical signals, with at least two regulating loops each comprising at least one amplifier unit. Advantageously, the circuit device comprises a device for subtracting a signal, made available by the circuit device and representing the difference between the electrical signals, from one of the electrical signals. In a preferred embodiment of the invention, the potentials on lines carrying the electrical signals are maintained at the same value with the help of a first one or of the regulating loops.

Abstract: A log circuit receives an operated current signal and a reference current signal at respective inputs and comprises an operand log circuit including a first bipolar semiconductor device and being configured to generate a first logarithmized signal on the basis of the operand current signal, a reference log circuit including a second bipolar semiconductor device and being configured to generate a second logarithmized signal on the basis of the reference current signal, and a differential-amplifier circuit receiving the first logarithmized signal and the second logarithmized signal, and outputting a differential-amplifier output signal in dependency on the first logarithmized signal and the second logarithmized signal.

Abstract: The present invention relates to an optical encoder for measuring the speed and direction of a moving raster. The raster may be moving linearly or angularly and may further be connected to a moving element, such as a spinning shaft, of which speed and orientation measurement Is sought. The raster may comprise a slit plate or the like and include many formations in sequence. The formations may be successively opaque and transparent to light. The raster modulates light from a light source and the modulated light is detected by at least one set of three photodetectors. Output of the photodetectors is then used to generate a reference signal to which individual outputs are compared. The results of the comparisons are indicative of the speed and direction of the raster and moving element to which the raster is attached.

Abstract: An apparatus and method for evaluating a digital information signal to be transmitted. A superimposition of the information with an interference signal can endanger an error-free data transmission. In order to ensure a correct data transmission, the information signal is amplified with a variable gain, where the information signal has been band-pass-filtered and demodulated beforehand, and fed to an integral-action controller that keeps the gain of the amplifier at a value corresponding to a controller threshold. Advantageously, the integral-action controller has a shorter time constant for increasing the gain than for reducing it, with the result that the gain is increased more rapidly than it is reduced. Thus, the integral-action control of the gain ensures that the band-pass-filtered and demodulated information signal is above a digitization threshold during its pulses and below the digitization threshold during its pulse intervals.

Abstract: The invention provides a circuit arrangement for conversion of an input current signal (11) to a digital output signal (43). In particular, the invention relates to a method for providing a low-capacitance voltage node for a comparator input of a tracking analog/digital converter. An input circuit node (12a) is supplied with an input current signal (11). A feedback current signal (13) is produced by the input circuit node (12a) in order to operate a tracking analog/digital converter. A difference current signal (14) is likewise produced by the input circuit node (12a), and is supplied to a transimpedance resistance element (15) connected to the input circuit node. A second connection of the transimpedance resistance element (15) is connected to a reference circuit node (12b). An intermediate variable (22) is produced at the reference circuit node (12b), and is supplied to a downstream converter device (23). A constant voltage with respect to ground (33) is maintained at the input circuit node (12a).

Abstract: An apparatus and method for evaluating a digital information signal to be transmitted. A superimposition of the information with an interference signal can endanger an error-free data transmission. In order to ensure a correct data transmission, the information signal is amplified with a variable gain, where the information signal has been band-pass-filtered and demodulated beforehand, and fed to an integral-action controller that keeps the gain of the amplifier at a value corresponding to a controller threshold. Advantageously, the integral-action controller has a shorter time constant for increasing the gain than for reducing it, with the result that the gain is increased more rapidly than it is reduced. Thus, the integral-action control of the gain ensures that the band-pass-filtered and demodulated information signal is above a digitization threshold during its pulses and below the digitization threshold during its pulse intervals.

Abstract: The invention provides a circuit arrangement for conversion of an input current signal (11) to a digital output signal (43). In particular, the invention relates to a method for providing a low-capacitance voltage node for a comparator input of a tracking analog/digital converter. An input circuit node (12a) is supplied with an input current signal (11). A feedback current signal (13) is produced by the input circuit node (12a) in order to operate a tracking analog/digital converter. A difference current signal (14) is likewise produced by the input circuit node (12a), and is supplied to a transimpedance resistance element (15) connected to the input circuit node. A second connection of the transimpedance resistance element (15) is connected to a reference circuit node (12b). An intermediate variable (22) is produced at the reference circuit node (12b), and is supplied to a downstream converter device (23). A constant voltage with respect to ground (33) is maintained at the input circuit node (12a).

Abstract: The present invention relates to an optical encoder for measuring the speed and direction of a moving raster. The raster may be moving linearly or angularly and may further be connected to a moving element, such as a spinning shaft, of which speed and orientation measurement is sought. The raster may comprise a slit plate or the like and include many formations in sequence. The formations may be successively opaque and transparent to light. The raster modulates light from a light source and the modulated light is detected by at least one set of three photodetectors. Output of the photodetectors is then used to generate a reference signal to which individual outputs are compared. The results of the comparisons are indicative of the speed and direction of the raster and moving element to which the raster is attached.

Abstract: There is provided an electronic ballast for supplying a load, for example a lamp, in particular a gas discharge lamp, with an a.c. voltage (Un) the frequency of which is higher than the mains frequency. The ballast has a rectifier (GL) to be connected to the a.c. mains, an inverter connected downstream thereof, having two switches (S2, S1), which inverter generates the higher frequency a.c. voltage for the load (Z), and an electronic harmonics filter arranged between the rectifier (GL) and the inverter, in the form of a clocked switching controller. The control switch (S1) of the clocked switching controller at the same time forms one of the two switches (S1) of the inverter.