Abstract: A voltage regulation circuit includes a switching output terminal, a high-side output transistor, a low-side output transistor, a high-side replica transistor, a low-side replica transistor, and a comparator circuit. The high-side output transistor is configured to drive the switching output terminal. The low-side output transistor is configured to drive the switching output terminal. The high-side replica transistor is coupled to the high-side output transistor. The low-side replica transistor is coupled to the high-side replica transistor and the low-side output transistor. The comparator circuit is coupled to the high-side replica transistor and the low-side replica transistor, and is configured to compare a signal received from both the high-side replica transistor and the low-side replica transistor to a ramp signal.

Abstract: An integrated circuit comprising: a source comprising an output port; a set of serially-connected resistors electrically coupled to the output port of the source; a comparator comprising a first input port, a second input port, and an output port; a set of switches, each switch in the set of switches comprising a first terminal electrically coupled to the first input port of the comparator, and a second terminal electrically coupled to the set of serially-connected resistors; a current source comprising an output port electrically coupled to the second input port of the comparator; and a pin electrically coupled to the output port of the current source.

Abstract: A voltage regulation circuit includes a switching output terminal, a high-side output transistor, a low-side output transistor, a high-side replica transistor, a low-side replica transistor, and a comparator circuit. The high-side output transistor is configured to drive the switching output terminal. The low-side output transistor is configured to drive the switching output terminal. The high-side replica transistor is coupled to the high-side output transistor. The low-side replica transistor is coupled to the high-side replica transistor and the low-side output transistor. The comparator circuit is coupled to the high-side replica transistor and the low-side replica transistor, and is configured to compare a signal received from both the high-side replica transistor and the low-side replica transistor to a ramp signal.

Abstract: A voltage regulation circuit includes a switching output terminal, a high-side output transistor, a low-side output transistor, a high-side replica transistor, a low-side replica transistor, and a comparator circuit. The high-side output transistor is configured to drive the switching output terminal. The low-side output transistor is configured to drive the switching output terminal. The high-side replica transistor is coupled to the high-side output transistor. The low-side replica transistor is coupled to the high-side replica transistor and the low-side output transistor. The comparator circuit is coupled to the high-side replica transistor and the low-side replica transistor, and is configured to compare a signal received from both the high-side replica transistor and the low-side replica transistor to a ramp signal.

Abstract: An electrical system includes: 1) a buck converter; 2) a battery coupled to an input of the buck converter; and 3) a load coupled to an output of the buck converter. The buck converter includes a high-side switch, a low-side switch, and regulation loop circuitry coupled to the high-side switch and the low-side switch. The regulation loop circuitry includes a comparator with preamplifier gain adjustment circuitry configured to adjust a preamplifier gain of the comparator based on an overdrive voltage.

Abstract: A semiconductor die includes a substrate and an integrated circuit provided on the substrate and having contacts. An electrically conductive layer is provided on the integrated circuit and defines electrically conductive elements electrically connected to the contacts. Electrically conductive interconnects coupled with respective electrically conductive elements. The electrically conductive interconnects have at least one of different sizes or shapes from one another.

Abstract: A semiconductor device with an isolation structure and a trench capacitor, each formed using a single resist mask for etching corresponding first and second trenches of different widths and different depths, with dielectric liners formed on the trench sidewalls and polysilicon filling the trenches and deep doped regions surrounding the trenches, including conductive features of a metallization structure that connect the polysilicon of the isolation structure trench to the deep doped region to form an isolation structure.

Abstract: A semiconductor die includes a substrate and an integrated circuit provided on the substrate and having contacts. An electrically conductive layer is provided on the integrated circuit and defines electrically conductive elements electrically connected to the contacts. Electrically conductive interconnects coupled with respective electrically conductive elements. The electrically conductive interconnects have at least one of different sizes or shapes from one another.

Abstract: A semiconductor device with an isolation structure and a trench capacitor, each formed using a single resist mask for etching corresponding first and second trenches of different widths and different depths, with dielectric liners formed on the trench sidewalls and polysilicon filling the trenches and deep doped regions surrounding the trenches, including conductive features of a metallization structure that connect the polysilicon of the isolation structure trench to the deep doped region to form an isolation structure.

Abstract: A semiconductor device with an isolation structure and a trench capacitor, each formed using a single resist mask for etching corresponding first and second trenches of different widths and different depths, with dielectric liners formed on the trench sidewalls and polysilicon filling the trenches and deep doped regions surrounding the trenches, including conductive features of a metallization structure that connect the polysilicon of the isolation structure trench to the deep doped region to form an isolation structure.

Abstract: A semiconductor die includes a substrate and an integrated circuit provided on the substrate and having contacts. An electrically conductive layer is provided on the integrated circuit and defines electrically conductive elements electrically connected to the contacts. Electrically conductive interconnects coupled with respective electrically conductive elements. The electrically conductive interconnects have at least one of different sizes or shapes from one another.

Abstract: An electrical system includes: 1) a buck converter; 2) a battery coupled to an input of the buck converter; and 3) a load coupled to an output of the buck converter. The buck converter includes a high-side switch, a low-side switch, and regulation loop circuitry coupled to the high-side switch and the low-side switch. The regulation loop circuitry includes a comparator with preamplifier gain adjustment circuitry configured to adjust a preamplifier gain of the comparator based on an overdrive voltage.

Abstract: A system comprises a DC-to-DC voltage converter, the DC-to-DC voltage converter comprising: a high-side FET comprising a gate, a source, and a drain; a node coupled to the source of the high-side FET; a low-side FET comprising a gate, a source, and a drain coupled to the node; and a controller coupled to the gate of the high-side FET to switch on and off the high-side FET, and coupled to the gate of the low-side FET to switch on and off the low-side FET, the controller configured to switch on the low-side FET for a time interval before switching on the high-side FET and to switch off the low-side FET before switching on the high-side FET.

Abstract: A system comprises a DC-to-DC voltage converter, the DC-to-DC voltage converter comprising: a high-side FET comprising a gate, a source, and a drain; a node coupled to the source of the high-side FET; a low-side FET comprising a gate, a source, and a drain coupled to the node; and a controller coupled to the gate of the high-side FET to switch on and off the high-side FET, and coupled to the gate of the low-side FET to switch on and off the low-side FET, the controller configured to switch on the low-side FET for a time interval before switching on the high-side FET and to switch off the low-side FET before switching on the high-side FET.

Abstract: An integrated circuit comprising: a source comprising an output port; a set of serially-connected resistors electrically coupled to the output port of the source; a comparator comprising a first input port, a second input port, and an output port; a set of switches, each switch in the set of switches comprising a first terminal electrically coupled to the first input port of the comparator, and a second terminal electrically coupled to the set of serially-connected resistors; a current source comprising an output port electrically coupled to the second input port of the comparator; and a pin electrically coupled to the output port of the current source.

Abstract: A DC-to-DC voltage converter includes a converter input for receiving a DC voltage. A first switch is coupled between the input and a first node. A second switch is coupled between the first node and a ground. An inductor is coupled between the first node and a converter output. A capacitor is coupled between the converter output and ground. An output voltage synthesizer is coupled to the converter input and the converter output for synthesizing the voltage at the first node and for generating a control signal for at least one of the first switch and the second switch in response to the voltages at the converter input and the converter output.

Abstract: A multi-phase power converter includes a plurality of power channels arranged in parallel to drive an output of the power converter, and a channel selection circuit. Each of the power channels includes a driver, a feedback control circuit coupled to an output of the driver, and a comparator coupled to the feedback control circuit. The channel selection circuit is coupled to the feedback control circuit of each of the power channels. The channel control circuit is configured to: select a different specific one of the power channels to activate in each of a plurality of phases, and introduce an offset voltage into each of the feedback control circuits, except the feedback control circuit of the specific one of the power channels. The feedback control circuit is configured to apply the offset to bias driver output feedback voltage away from a threshold voltage at which the power channel is activated.

Abstract: A controller for a DC-DC converter includes a state machine and a plurality of drivers for controlling switches in the DC-DC converter, where each state in the state machine determines a state of the drivers, and a plurality of timers, where each state in the state machine, other than a passive state, has an associated timer for the state of the drivers.

Abstract: A multi-phase power converter includes a plurality of power channels arranged in parallel to drive an output of the power converter, and a channel selection circuit. Each of the power channels includes a driver, a feedback control circuit coupled to an output of the driver, and a comparator coupled to the feedback control circuit. The channel selection circuit is coupled to the feedback control circuit of each of the power channels. The channel control circuit is configured to: select a different specific one of the power channels to activate in each of a plurality of phases, and introduce an offset voltage into each of the feedback control circuits, except the feedback control circuit of the specific one of the power channels. The feedback control circuit is configured to apply the offset to bias driver output feedback voltage away from a threshold voltage at which the power channel is activated.

Abstract: A controller for a DC-DC converter includes a state machine and a plurality of drivers for controlling switches in the DC-DC converter, where each state in the state machine determines a state of the drivers, and a plurality of timers, where each state in the state machine, other than a passive state, has an associated timer for the state of the drivers.