Abstract: A package comprising an acoustic device, a polymer frame coupled to the acoustic device, a plurality of frame interconnects located in the polymer frame, where the plurality of frame interconnects are coupled to the acoustic device, a polymer cap layer coupled to the acoustic device though the polymer frame, where the polymer cap layer is configured as a cap for the acoustic device, a plurality of cap interconnects located in the polymer cap layer, where the plurality of cap interconnects are coupled to the plurality of frame interconnects, and a cavity located between the acoustic device and the polymer cap layer. The acoustic device includes a substrate and an acoustic element coupled to the substrate.

Abstract: A stacked AW filter package includes a first substrate stacked on a second substrate. The first substrate has a first AW filter circuit on first surface and a metal layer on a second surface. The second substrate has a second AW filter circuit disposed in a cavity between the metal layer of the first substrate and a third surface of the second substrate. The metal layer is coupled to the second AW filter circuit by a metal interconnect formed in a metallization layer on a side surface of the first substrate. The metal layer provides isolation to reduce cross-talk (e.g., electromagnetic interference) within the stacked AW filter package between the first AW filter circuit and the second AW filter circuit. Including the metal layer in the stacked AW filter package improves signal quality of transmitted and received signals filtered in the first and second AW filter circuits.

Abstract: A package that includes an acoustic device, a frame coupled to the acoustic device and a cap substrate coupled to the acoustic device through the frame. The acoustic device includes a substrate and an acoustic element coupled to the substrate. The cap substrate includes an inductor. The cap substrate is configured as a cap for the acoustic device. The package includes a cavity located between the acoustic device and the cap substrate. The frame may include a polymer frame.

Abstract: A multi-level stacked AW filter package including a first acoustic wave (AW) filter stacked on a second AW filter employs semiconductor fabrication methods and structures, including a metallization layer comprising interconnects to couple a contact surface to the second AW filter. Each AW filter includes an AW filter circuit on a semiconductor substrate. A second substrate disposed on a frame on the substrate protects the AW filter circuit. In a multi-level AW filter package, the second substrate of the first AW filter comprises a glass substrate with a similar expansion rate as the semiconductor substrate. The interconnects coupling the second AW filter to the contact surface are disposed on insulators on the side wall surfaces of the semiconductor substrates of the first AW filter for isolation. In a stacked AW filter package comprising a single AW filter, the interconnects couple the contact surface to the AW filter.

Abstract: A wafer-level package for micro-acoustic devices and a method of manufacture is provided. The package comprises a base wafer with electric device structures. A frame structure is sitting on top of the base wafer enclosing particular device areas for the micro-acoustic devices. A cap wafer provided with a thin polymer coating is bonded to the frame structure to form a closed cavity over each device area and to enclose within the cavity the device structures arranged on the respective device area.

Abstract: A passive on glass (POG) on filter capping apparatus may include an acoustic filter die. The apparatus may further include a capping die electrically coupled to the acoustic filter die. The capping die may include a 3D inductor.

Abstract: A passive on glass (POG) on filter capping apparatus may include an acoustic filter die. The apparatus may further include a capping die electrically coupled to the acoustic filter die. The capping die may include a 3D inductor.

Abstract: A carrier plate includes a substrate and at least one conductor track. The conductor track includes a first layer, which is applied directly on the substrate, and a second layer, which is arranged on the first layer. The second layer includes a supply line region and a soldering region. Furthermore, the second layer is completely interrupted between the supply line region and the soldering region. A device can be produced with a carrier plate and an electrical component arranged on the carrier plate.

Abstract: A light-emitting diode arrangement includes a light-emitting diode and a coding resistor for coding the light-emitting diode. The coding resistor is embodied as a star connection of a number of resistors. Furthermore, a module includes a plurality of light-emitting diode arrangements. Furthermore, a method for producing a light-emitting diode arrangement is specified, wherein the coding of a coding resistor is carried out depending on a determined characteristic of the light-emitting diode.

Abstract: A light-emitting diode arrangement includes a light-emitting diode and a coding resistor for coding the light-emitting diode. The coding resistor is embodied as a star connection of a number of resistors. Furthermore, a module includes a plurality of light-emitting diode arrangements. Furthermore, a method for producing a light-emitting diode arrangement is specified, wherein the coding of a coding resistor is carried out depending on a determined characteristic of the light-emitting diode.

Abstract: A carrier plate includes a substrate and at least one conductor track. The conductor track includes a first layer, which is applied directly on the substrate, and a second layer, which is arranged on the first layer. The second layer includes a supply line region and a soldering region. Furthermore, the second layer is completely interrupted between the supply line region and the soldering region. A device can be produced with a carrier plate and an electrical component arranged on the carrier plate.

Abstract: A method for patterning a layer stack with at least one ceramic layer includes providing the ceramic layer, which has at least one plated-through hole. An electrically conductive layer is applied above the ceramic layer, such that the electrically conductive layer is electrically coupled to the at least one plated-through hole. A further layer is deposited onto the electrically conductive layer in the region of the at least one plated-through hole, wherein the further layer includes nickel. The electrically conductive layer is removed outside the region of the at least one plated-through hole. A carrier device patterned in this way can be electrically and mechanically coupled to an electronic component.

Abstract: A method for patterning a layer stack with at least one ceramic layer includes providing the ceramic layer, which has at least one plated-through hole. An electrically conductive layer is applied above the ceramic layer, such that the electrically conductive layer is electrically coupled to the at least one plated-through hole. A further layer is deposited onto the electrically conductive layer in the region of the at least one plated-through hole, wherein the further layer includes nickel. The electrically conductive layer is removed outside the region of the at least one plated-through hole. A carrier device patterned in this way can be electrically and mechanically coupled to an electronic component.