Abstract: This disclosure relates to an all digital phase-lock loop (ADPLL). The ADPLL determines an error generated by a digitally controlled oscillator (DCO) which is operated using a tuning word, stores information related to the error, and compensates for the error based on the stored information.

Abstract: There is described a contactless communication device. The device comprises (a) a receiver unit (110, 610) having an antenna input (RXn, Vmid, RXp) for connecting to an antenna, the receiver unit (110, 610) being adapted to couple with a transmitting device and to receive an RF signal transmitted by the transmitting device, the receiver unit (110, 610) being further adapted to determine a point of time relating to a position of data within the RF signal, (b) a comparator (120) adapted to generate a comparator output signal (agc_comp) which is indicative of a relation between a voltage at the antenna input (RXn, Vmid, RXp) of the receiver unit (110, 610) and a reference voltage (Vref), and (c) a voltage regulation circuit coupled to the comparator (120) and to the antenna input (RXn, Vmid, RXp) of the receiver unit (110, 610), the voltage regulation circuit being adapted to repetitively regulate the voltage at the antenna input (RXn, Vmid, RXp) based on the comparator output signal (agc_comp).

Abstract: There is described an RF bidirectional communication device utilizing active load modulation, the device comprising (a) a resonance circuit including an antenna (326), and (b) a control unit (322) for controlling communication of the device, including switching between a transmission mode and a receiving mode, wherein the control unit is adapted to (c) modify a configuration of the resonance circuit such that the resonance circuit has a first resonance frequency (f0) when the device is in the transmission mode and a second resonance frequency (f0+?f) when the device is in the receiving mode, and (d) modify the configuration of the resonance circuit such that a Q-factor of the resonance circuit is periodically decreased while the device is in the transmission mode. There is also described a corresponding method and a system comprising a RF device and a reader/writer device. Furthermore, there is described a computer program and a computer program product.

Abstract: This disclosure relates to an all digital phase-lock loop (ADPLL). The ADPLL determines an error generated by a digitally controlled oscillator (DCO) which is operated using a tuning word, stores information related to the error, and compensates for the error based on the stored information.

Abstract: This disclosure relates to an all digital phase-lock loop (ADPLL). The ADPLL determines an error generated by a digitally controlled oscillator (DCO) which is operated using a tuning word, stores information related to the error, and compensates for the error based on the stored information.

Abstract: This disclosure relates to an all digital phase-lock loop (ADPLL). The ADPLL determines an error generated by a digitally controlled oscillator (DCO) which is operated using a tuning word, stores information related to the error, and compensates for the error based on the stored information.

Abstract: This disclosure relates to systems and methods for frequency to phase conversion using uniform sampling, where a uniform or constant clock period is used.