Abstract: A method of manufacturing a package includes forming an adhesion promoter on at least part of an electronic component. The adhesion promoter is a morphological adhesion promoter including a morphological structure having a plurality of openings. The method further includes at least partially encapsulating the electronic component with an inorganic encapsulant with the adhesion promoter in between. The adhesion promoter enhances adhesion between at least part of the electronic component and the encapsulant.

Abstract: A method of forming a semiconductor package includes providing a panel, providing one or more metal layers on an upper surface of the panel, forming a die pad and bond pads from the one or more metal layers, the die pad being adjacent to and spaced apart from the bond pads, attaching a die to the die pad, forming electrical connections between the die and the bond pads, encapsulating the die and the electrical connections with an electrically insulating mold compound, removing portions of the panel, and exposing the die pad and the bond pads after encapsulating the die.

Abstract: A package includes an electronic component, an inorganic encapsulant encapsulating at least part of the electronic component, and an adhesion promoter between at least part of the electronic component and the encapsulant.

Abstract: A method of producing packaged semiconductor devices includes providing a first packaging substrate panel, providing a second packaging substrate panel, and moving the first and second packaging substrate panels through an assembly line that comprises a plurality of package assembly tools using a control mechanism. First type packaged semiconductor devices are formed on the first packaging substrate panel and second type packaged semiconductor devices are formed on the second packaging substrate panel. The control mechanism moves both of the first and packaging substrate panels through the assembly line in a non-linear manner. The first and second packaged semiconductor devices differ with respect to at least one of: lead configuration, and encapsulant configuration.

Abstract: A molding compound and a semiconductor arrangement with a molding compound are disclosed. The molding compound includes a matrix and a filler including filler particles. The filler particles each include a core with an electrically conducting or a semiconducting material and an electrically insulating cover.

Abstract: A method of forming a semiconductor package includes providing a panel, providing one or more metal layers on an upper surface of the panel, forming a die pad and bond pads from the one or more metal layers, the die pad being adjacent to and spaced apart from the bond pads, attaching a die to the die pad, forming electrical connections between the die and the bond pads, encapsulating the die and the electrical connections with an electrically insulating mold compound, removing portions of the panel, and exposing the die pad and the bond pads after encapsulating the die.

Abstract: A package includes an electronic component, an inorganic encapsulant encapsulating at least part of the electronic component, and an adhesion promoter between at least part of the electronic component and the encapsulant.

Abstract: A method of producing packaged semiconductor devices includes providing a first packaging substrate panel, providing a second packaging substrate panel, and moving the first and second packaging substrate panels through an assembly line that comprises a plurality of package assembly tools using a control mechanism. First type packaged semiconductor devices are formed on the first packaging substrate panel and second type packaged semiconductor devices are formed on the second packaging substrate panel. The control mechanism moves both of the first and packaging substrate panels through the assembly line in a non-linear manner. The first and second packaged semiconductor devices differ with respect to at least one of: lead configuration, and encapsulant configuration.

Abstract: A method of producing packaged semiconductor devices includes providing a first packaging substrate panel. A second packaging substrate panel is provided. The first and second packaging substrate panels are moved through an assembly line that includes a plurality of package assembly tools using a control mechanism. First type packaged semiconductor devices are formed on the first packaging substrate panel and second type packaged semiconductor devices are formed on the second packaging substrate panel. The second type packaged semiconductor device is different than the first type packaged semiconductor device. The control mechanism moves both of the first and packaging substrate panels through the assembly line in a non-linear manner.

Abstract: A method for manipulating ions contained in an encapsulation material for a semiconductor device is provided. The method includes processing the encapsulation material and applying an electric field to the encapsulation material before the encapsulation material is finally cured. The ions contained in the encapsulation material have a mobility that decreases as the encapsulation material cures. By applying the electric field to the encapsulation material before the encapsulation material is finally cured, the amount of ions contained in the encapsulation material is reduced and/or the ions contained are concentrated in one or more regions of the encapsulation material. Corresponding apparatuses and semiconductor packages manufactured by the method are also described.

Abstract: A method for manipulating ions contained in an encapsulation material for a semiconductor device is provided. The method includes processing the encapsulation material and applying an electric field to the encapsulation material before the encapsulation material is finally cured. The ions contained in the encapsulation material have a mobility that decreases as the encapsulation material cures. By applying the electric field to the encapsulation material before the encapsulation material is finally cured, the amount of ions contained in the encapsulation material is reduced and/or the ions contained are concentrated in one or more regions of the encapsulation material. Corresponding apparatuses and semiconductor packages manufactured by the method are also described.

Abstract: A molding compound and a semiconductor arrangement with a molding compound are disclosed. The molding compound includes a matrix and a filler including filler particles. The filler particles each include a core with an electrically conducting or a semiconducting material and an electrically insulating cover.

Abstract: A method of producing packaged semiconductor devices includes providing a first packaging substrate panel. A second packaging substrate panel is provided. The first and second packaging substrate panels are moved through an assembly line that includes a plurality of package assembly tools using a control mechanism. First type packaged semiconductor devices are formed on the first packaging substrate panel and second type packaged semiconductor devices are formed on the second packaging substrate panel. The second type packaged semiconductor device is different than the first type packaged semiconductor device. The control mechanism moves both of the first and packaging substrate panels through the assembly line in a non-linear manner.

Abstract: A method for writing to the magnetoresistive memory cells of a MRAM memory, includes applying write currents respectively onto a word line and a bit line. A superposition of the magnetic fields generated by the write currents in each memory cell selected by the corresponding word lines and bits lines alter a direction of the magnetization thereof. According to the method, the write currents are applied in a chronologically offset manner, to the corresponding word line and the bit line whereby the direction of magnetization of the selected memory cell is rotated in several consecutive steps in the desired direction for writing a logical “0” or “1”.

Abstract: A method for writing to the magnetoresistive memory cells of a MRAM memory, includes applying write currents respectively onto a word line and a bit line. A superposition of the magnetic fields generated by the write currents in each memory cell selected by the corresponding word lines and bits lines alter a direction of the magnetization thereof. According to the method, the write currents are applied in a chronologically offset manner, to the corresponding word line and the bit line whereby the direction of magnetization of the selected memory cell is rotated in several consecutive steps in the desired direction for writing a logical “0” or “1”.

Abstract: Memory cell arrangement having a memory cell array which has at least one layer of magnetoresistive memory components (11) which are each connected to first contact-making lines (10), the first contact-making lines (10) lying within a first dielectric layer (6), and are each connected to second contact-making lines (20; 29; 35), the second contact-making lines (20; 29; 35) lying within a second dielectric layer (17; 27; 32).

Abstract: Memory cell arrangement having a memory cell array which has at least one layer of magnetoresistive memory components (11) which are each connected to first contact-making lines (10), the first contact-making lines (10) lying within a first dielectric layer (6), and are each connected to second contact-making lines (20; 29; 35), the second contact-making lines (20; 29; 35) lying within a second dielectric layer (17; 27; 32).

Abstract: A memory cell configuration has memory cells that each contain two magnetoresistive elements. If the two magnetoresistive elements of each memory cell are magnetized in such a way that they have different resistances, the information stored in the memory cell can be determined with a resistor half-bridge circuit by assessing whether the signal tapped off at the output is greater than or less than zero.

Abstract: A memory cell configuration has memory cells that each contain two magnetoresistive elements. If the two magnetoresistive elements of each memory cell are magnetized in such a way that they have different resistances, the information stored in the memory cell can be determined with a resistor half-bridge circuit by assessing whether the signal tapped off at the output is greater than or less than zero.

Abstract: The invention relates to a method for fabricating in particular a TMR element for use in a MRAM, wherein a mask is arranged on a substrate and structured in such a manner that it shadows but does not cover a surface region of the substrate, and wherein material of the structure which is to be fabricated is then deposited on the substrate in a directed deposition process. The invention also relates to a component with a micro-technical structure which has been fabricated in this manner.