Abstract: A modeller for a system for determining a residual error probability. The modeller includes a component modeller, which is adapted to receive an error probability and to model a change of the error probability due to a behaviour of a system component, in order to output a changed error probability as residual error probability.

Abstract: A patterned connection plane between two semiconductor chips which are connected using face-to-face technology is patterned into first pads, second pads, and conductor strips which are alternatively connected to one of these pads. The conductor strips are connected to a read-out circuit in one of the semiconductor chips via connections.

Abstract: A method for operating a data storage medium when changing from an operating mode to a directly subsequent power-saving quiescent mode, where the operating mode effects a transmission delay for the last item of information which is to be transmitted, so that immediately after the last item of information which is to be transmitted has been transmitted the quiescent mode is activated and the maximum permissible power consumption is observed.

Abstract: Circuit arrangement including an encoding unit having a first input for receiving an address word and a second input for receiving a data word and a check word, wherein the encoding unit outputs an alarm signal if the check word does not correspond to at least the address word or the data word.

Abstract: A memory arrangement having a memory area with a plurality of memory locations, to which external addresses can be allocated, and an address decoder which is coupled to the memory area and which includes an address input for applying an external address. The address decoder can be switched so that one of the external addresses of an address range is allocated to each memory location of the memory area, or that one of the external addresses of a sub-address range of the address range is allocated to each memory location only within a part-memory area of the memory area. The address decoder is also arranged for identifying the memory location allocated to the external address applied.

Abstract: A data transmission method and interface for interchanging data between a reader and a chip card, wherein the data transmission interface has a variable number of channels.

Abstract: A memory arrangement having a memory area with a plurality of memory locations, to which external addresses can be allocated, and an address decoder which is coupled to the memory area and which includes an address input for applying an external address. The address decoder can be switched so that one of the external addresses of an address range is allocated to each memory location of the memory area, or that one of the external addresses of a sub-address range of the address range is allocated to each memory location only within a part-memory area of the memory area. The address decoder is also arranged for identifying the memory location allocated to the external address applied.

Abstract: Circuit arrangement including an encoding unit having a first input for receiving an address word and a second input for receiving a data word and a check word, wherein the encoding unit outputs an alarm signal if the check word does not correspond to at least the address word or the data word.

Abstract: A patterned connection plane between two semiconductor chips which are connected using face-to-face technology is patterned into first pads, second pads, and conductor strips which are alternatively connected to one of these pads. The conductor strips are connected to a read-out circuit in one of the semiconductor chips via connections.

Abstract: A method for operating a data storage medium when changing from an operating mode to a directly subsequent power-saving quiescent mode, where the operating mode effects a transmission delay for the last item of information which is to be transmitted, so that immediately after the last item of information which is to be transmitted has been transmitted the quiescent mode is activated and the maximum permissible power consumption is observed.

Abstract: A data transmission method and interface for interchanging data between a reader and a chip card, wherein the data transmission interface has a variable number of channels.

Abstract: A contactless data storage medium includes: a coupling element; a data processing unit which is connected to the coupling element and is set up to receive data via the coupling element; and a power supply unit which is connected to the coupling element and is intended to provide electrical power in order to operate the data processing unit. The inventive contactless data storage medium is distinguished by the fact that it includes a signal indicator which can be driven by the data processing unit and/or the power supply unit.

Abstract: Line-conducted interface arrangement having at least three signal lines connected between a host and a device, a detector which is connected to the signal lines at a device end of the interface arrangement and which detects an interface configuration prescribed at the host, and a switch controlled by the detector to adapt the device to the interface configuration prescribed at the host.