Abstract: A power semiconductor package comprises a leadframe comprising a first die pad, a second die pad and a plurality of external contacts. The first and second die pads are separated by a first gap. A power semiconductor die is arranged on and electrically coupled to a first side of the first die pad. A diode is arranged on and electrically coupled to a first side of the second die pad. A molded body encapsulates the power semiconductor die and the diode, the molded body having a first side, an opposite second side and lateral sides connecting the first and second sides. A second side of the first die pad is exposed from the second side of the molded body. A second side of the second die pad is completely covered by an electrically insulating material.

Abstract: A transistor package includes a semiconductor transistor chip having opposite first and second surfaces, one or a plurality of first load electrodes, one or a plurality of second load electrodes, and a control electrode on the first surface. A leadframe faces the first surface of the semiconductor transistor chip and includes a first terminal, a second terminal, and a control terminal of the package which are exposed at a bottom of the package. The first terminal is electrically coupled to the first load electrode(s). The second terminal is electrically coupled to the second load electrode(s). The control terminal is electrically coupled to the control electrode. The first terminal is aligned with a first side of the package. The second terminal is aligned with a second side opposite the first side. The control terminal is aligned with a third side of the package which connects between the first and second sides.