Abstract: A semiconductor device that has at least one semiconductor chip attached to a leadframe made of sheet metal of unencumbered full thickness. The leadframe has leads of a first subset that alternate with leads of a second subset. The leads of the first and second subsets have elongated straight lead portions that are parallel to each other in a planar array. A cover layer of insulating material is located over portions of un-encapsulated lead surfaces. The portions of the leads of the first and second subsets that don't have the cover layer have a metallurgical configuration that creates an affinity for solder wetting.

Abstract: A semiconductor device that has at least one semiconductor chip attached to a leadframe made of sheet metal of unencumbered full thickness. The leadframe has leads of a first subset that alternate with leads of a second subset. The leads of the first and second subsets have elongated straight lead portions that are parallel to each other in a planar array. A cover layer of insulating material is located over portions of un-encapsulated lead surfaces. The portions of the leads of the first and second subsets that don't have the cover layer have a metallurgical configuration that creates an affinity for solder wetting.

Abstract: A semiconductor device that has at least one semiconductor chip attached to a leadframe made of sheet metal of unencumbered full thickness. The leadframe has leads of a first subset that alternate with leads of a second subset. The leads of the first and second subsets have elongated straight lead portions that are parallel to each other in a planar array. A cover layer of insulating material is located over portions of un-encapsulated lead surfaces. The portions of the leads of the first and second subsets that don't have the cover layer have a metallurgical configuration that creates an affinity for solder wetting.

Abstract: A semiconductor device that has at least one semiconductor chip attached to a leadframe made of sheet metal of unencumbered full thickness. The leadframe has leads of a first subset that alternate with leads of a second subset. The leads of the first and second subsets have elongated straight lead portions that are parallel to each other in a planar array. A cover layer of insulating material is located over portions of un-encapsulated lead surfaces. The portions of the leads of the first and second subsets that don't have the cover layer have a metallurgical configuration that creates an affinity for solder wetting.

Abstract: A system can include a switching circuit configured to conduct electrical current through at least one switch device thereof during an activation interval of the switch device in response to a periodic control signal. A tracking system is configured to provide a tracking signal indicative of a predetermined point of the activation interval. Sampling circuitry is configured to measure the electrical current at the predetermined point of the activation interval in response to the tracking signal, such that the sampling circuitry provides an output signal indicative of an average electrical current.

Abstract: An integrated circuit (IC) includes a substrate having a semiconducting surface, a first array of devices on and in the semiconducting surface including first and second coacting current conducting nodes, a plurality of layers disposed on the substrate and including at a electrically conductive layers and dielectric layer, and a plurality of bump pads on or in the top surface of the dielectric layers. In the IC, the electrically conductive layers define electrical traces, where a first portion of the electrical traces contact a first portion of the bump pads exclusively to a portion of the first coacting current conducting nodes, where a second portion of the electrical traces contact a second portion of the bump pads exclusively to a portion of the second coacting current conducting nodes, and where the electrical traces are electrically isolated from one another by the dielectric layers.

Abstract: A system can include a switching circuit configured to conduct electrical current through at least one switch device thereof during an activation interval of the switch device in response to a periodic control signal. A tracking system is configured to provide a tracking signal indicative of a predetermined point of the activation interval. Sampling circuitry is configured to measure the electrical current at the predetermined point of the activation interval in response to the tracking signal, such that the sampling circuitry provides an output signal indicative of an average electrical current.

Abstract: An integrated circuit (IC) includes a substrate having a semiconducting surface, a first array of devices on and in the semiconducting surface including first and second coacting current conducting nodes, a plurality of layers disposed on the substrate and including at a electrically conductive layers and dielectric layer, and a plurality of bump pads on or in the top surface of the dielectric layers. In the IC, the electrically conductive layers define electrical traces, where a first portion of the electrical traces contact a first portion of the bump pads exclusively to a portion of the first coacting current conducting nodes, where a second portion of the electrical traces contact a second portion of the bump pads exclusively to a portion of the second coacting current conducting nodes, and where the electrical traces are electrically isolated from one another by the dielectric layers.

Abstract: An apparatus for driving a pulse width modulation reference signal includes: (a) A converting unit receiving an input signal at an input locus and presenting an output current at an output locus. The input signal varies at a first frequency. The output current is substantially related with the first frequency. (b) A capacitive element coupled with the output locus for charging by the output current. The pulse width modulation reference signal is related with voltage across the capacitive element.

Abstract: A method and apparatus for use in a multi-phase power system. The power system is of the type having a plurality of Pulse Width Modulation (PWM) controllers including a first PWM controller and at least one second PWM controller. The first PWM controller generates at least one first PWM output signal based on a cyclic signal having a cyclically recurring parameter, and provides the cyclic signal including the cyclically recurring parameter to the second PWM controller. The second PWM controller generates at least one second PWM output signal based on the cyclic signal, and synchronizes the generation of the first and second output signals using the cyclically recurring parameter within the cyclic signal, thereby maintaining a predetermined phase relationship between the first and second output signals.

Abstract: A method and apparatus for use in a multi-phase power system. The power system is of the type having a plurality of Pulse Width Modulation (PWM) controllers including a first PWM controller and at least one second PWM controller. The first PWM controller generates at least one first PWM output signal based on a cyclic signal having a cyclically recurring parameter, and provides the cyclic signal including the cyclically recurring parameter to the second PWM controller. The second PWM controller generates at least one second PWM output signal based on the cyclic signal, and synchronizes the generation of the first and second output signals using the cyclically recurring parameter within the cyclic signal, thereby maintaining a predetermined phase relationship between the first and second output signals.

Abstract: A multi-module DC-DC converter provides synchronization between modules based on identification of a module within a chain. A resistor network can be used for the chain so that each module obtains a particular voltage based on its position within the chain. A master module provides a source current to drive the chain so that each module can determine its relative position in the chain based on voltage readings. With this configuration, a master module can determine how many modules are in the chain, and each slave module can determine its relative position in the chain. The module information contributes to synchronization between the modules for use in current ripple cancellation, for example, in the multi-module DC-DC converter.