Abstract: The invention relates to a data processing device with a functionally programmable logic circuit and a programming interface. An authorization control unit is provided, which protects the programming interface against an unauthorized access. This enables the functions of a semiconductor module to be changed in a customer-specific manner while preventing unauthorized entities from subsequently changing the functionality.

Abstract: An ohmic resistance is present between two parts of a conductor layer so that the size of the ohmic resistance can be ascertained and/or a semiconductor region is present in or on a layer forming the dielectric. The conductor layer is structured into a gate contact, a source contact, and a drain contact so that a transistor function or switching function is possible in the semiconductor region. Such a configuration allows an attempt to analyze the circuit integrated in the chip to be detected.

Abstract: An integrated security circuit, for example, a microcontroller for smart cards, includes a function unit executing a security function. A control device determines the number of executions of the security function per unit of time. The continued execution of the security function is blocked when a threshold value is exceeded. For such a purpose, an analog timekeeper incorporating a charge storage device is preferably provided that measures the elapsing time even with the supply potential disconnected. A usage counter is updated whenever the security function is called. The security circuit offers increased protection against statistical attacks. The complexity involved in the implementation is justifiably low. The security circuit is compatible with the existing system.

Abstract: A circuit for monitoring an entry into a test mode of a chip circuit has a fusible link which can be fired via a firing transistor. A flipflop, which permits access to the test mode, is set by a resulting voltage drop, with the aid of an edge detector. The number of times the test mode has been accessed can be detected from the number of fired fusible links.

Abstract: In a digital circuit comprising an asynchronous circuit, the supply voltage of the asynchronous circuit is varied by means of a random voltage jitter. The random variation of the supply voltage causes a time jitter in the processing of the individual operations within the asynchronous circuit, whereby an artificial synchronizing of individual measurements in side channel attacks is prevented.

Abstract: The invention relates to a data processing device with a functionally programmable logic circuit and a programming interface. An authorization control unit is provided, which protects the programming interface against an unauthorized access. This enables the functions of a semiconductor module to be changed in a customer-specific manner while preventing unauthorized entities from subsequently changing the functionality.

Abstract: A circuit configuration with a deactivatable scan path, includes a number of function blocks each connected to at least one other of the function blocks. At least one sub-set of the connections is in the form of a respective interlocking element which can be switched through an activation line (Scan Enable) from a normal mode to a test mode and which has a further data input and data output. The further data inputs and outputs are connected to one another by data line sections in such a manner that the interlocking elements form a shift register which provides a scan path. At least one electrically programmable protection element, which either interrupts a given line or connects it to a defined potential, is disposed along the activation line (Scan Enable) and/or the data line sections.

Abstract: An ohmic resistance is present between two parts of a conductor layer so that the size of the ohmic resistance can be ascertained and/or a semiconductor region is present in or on a layer forming the dielectric. The conductor layer is structured into a gate contact, a source contact, and a drain contact so that a transistor function or switching function is possible in the semiconductor region. Such a configuration allows an attempt to analyze the circuit integrated in the chip to be detected.

Abstract: A data processing method where data to be processed is feed to a processing unit. Supplying a current to the processing unit for operating the processing unit and supplying in a randomly controlled manner a part of the current fed to the processing unit, to an auxiliary circuit.

Abstract: A circuit for monitoring an entry into a test mode of a chip circuit has a fusible link which can be fired via a firing transistor. A flipflop, which permits access to the test mode, is set by a resulting voltage drop, with the aid of an edge detector. The number of times the test mode has been accessed can be detected from the number of fired fusible links.

Abstract: An integrated security circuit, for example, a microcontroller for smart cards, includes a function unit executing a security function. A control device determines the number of executions of the security function per unit of time. The continued execution of the security function is blocked when a threshold value is exceeded. For such a purpose, an analog timekeeper incorporating a charge storage device is preferably provided that measures the elapsing time even with the supply potential disconnected. A usage counter is updated whenever the security function is called. The security circuit offers increased protection against statistical attacks. The complexity involved in the implementation is justifiably low. The security circuit is compatible with the existing system.

Abstract: A circuit configuration with a deactivatable scan path, includes a number of function blocks each connected to at least one other of the function blocks. At least one sub-set of the connections is in the form of a respective interlocking element which can be switched through an activation line (Scan Enable) from a normal mode to a test mode and which has a further data input and data output. The further data inputs and outputs are connected to one another by data line sections in such a manner that the interlocking elements form a shift register which provides a scan path. At least one electrically programmable protection element, which either interrupts a given line or connects it to a defined potential, is disposed along the activation line (Scan Enable) and/or the data line sections.