Abstract: A pulse generator generates a square-wave pulsed signal that has a variable pulse width. The pulse width, which is defined by the delay through a delay line, varies in response to variations in an input voltage, as well as in response to phase differences between a reference clock signal and a trigger signal.

Abstract: Pulse width modulation controller apparatus and techniques are presented for balancing output currents of DC-DC converter stages in a multi-stage DC-DC conversion system in which a reference current is provided according to an input voltage and the value of a connected resistor, and a correction current output signal is generated that represents the difference between an average converter stage load current and the local load current, with the on-time of the PWM output signal being generated by charging a capacitance using a charging current obtained by offsetting the reference current output signal with the correction current output signal.

Abstract: A control circuit configured to control a switching power supply including a ramp generator configured to generate a triangular waveform. A comparator is configured to generate a series of pulse width modulated (PWM) pulses at a first frequency and to regulate the switching power supply. The ramp generator includes a capacitor, a charging current source configured to provide a charging current to charge the capacitor, and a discharging current source configured to provide a discharging current to discharge the capacitor. The ramp generator also includes a closed loop current balancing current source configured to balance the currents from the charging and discharging current sources to establish a substantially zero direct current (DC) bias across the capacitor. The controller also includes a multi-phase configuration to provide a stackable multi-channel architecture.

Abstract: Pulse width modulation controller apparatus and techniques are presented for balancing output currents of DC-DC converter stages in a multi-stage DC-DC conversion system in which a reference current is provided according to an input voltage and the value of a connected resistor, and a correction current output signal is generated that represents the difference between an average converter stage load current and the local load current, with the on-time of the PWM output signal being generated by charging a capacitance using a charging current obtained by offsetting the reference current output signal with the correction current output signal.

Abstract: A control circuit configured to control a switching power supply including a ramp generator configured to generate a triangular waveform. A comparator is configured to generate a series of pulse width modulated (PWM) pulses at a first frequency and to regulate the switching power supply. The ramp generator includes a capacitor, a charging current source configured to provide a charging current to charge the capacitor, and a discharging current source configured to provide a discharging current to discharge the capacitor. The ramp generator also includes a closed loop current balancing current source configured to balance the currents from the charging and discharging current sources to establish a substantially zero direct current (DC) bias across the capacitor. The controller also includes a multi-phase configuration to provide a stackable multi-channel architecture.

Abstract: Synchronously stackable double-edge modulated pulse width modulation generators are disclosed. An example pulse width modulation generator includes a ramp generator to generate first and second ramp signals that interact to form a virtual ramp signal; and a comparator module coupled to the ramp generator configured to produce a pulse width modulated signal based on a comparison between the virtual ramp signal and an input signal.

Abstract: Synchronously stackable double-edge modulated pulse width modulation generators are disclosed. An example pulse width modulation generator includes a ramp generator to generate first and second ramp signals that interact to form a virtual ramp signal; and a comparator module coupled to the ramp generator configured to produce a pulse width modulated signal based on a comparison between the virtual ramp signal and an input signal.

Abstract: A pulse width modulator (305) for driving a load in a multi-phased power system having circuitry (270) responsive to channel signals for providing an average signal by summing the channel signals at a node (221) which is coupled with a plurality of resistive elements, and having further circuitry for providing an error between said load and said reference potential, and having still further circuitry (250) for summing the channel signals, average signal, and error for providing a respective drive signal for each of the power switches, wherein the error signal and the average signal have complementary effects on a duty factor of the drive signals and the channel signal has an effect contrary to the error signal and the average signal. Further, a plurality of pulse width modulators (305) can be combined as a system (300) by connecting respective nodes (221) for providing current sharing between all phases.

Abstract: A highly efficient multi-phase power system having both reduced size and reduced cost. The multi-phase power system includes a plurality of Pulse Width Modulation (PWM) controllers. A first controller is programmed to function as a “master” controller, and the remaining controller(s) are programmed to function as “slave” controllers. Each controller includes a synchronous counter and control logic circuitry. The control logic generates at least one synchronization output signal based on the outputs of the counter and the programming state (i.e., master or slave) of the controller. The master controller generates a master clock signal having a synchronizing state encoded thereon and provides the master clock to the slave controller, which includes synchronization circuitry for receiving the master clock and resetting the counter based on the synchronizing state of the master clock, thereby assuring that appropriate phase relationships are maintained between the controller outputs.

Abstract: A highly efficient multi-phase power system having both reduced size and reduced cost. The multi-phase power system includes a plurality of Pulse Width Modulation (PWM) controllers. A first controller is programmed to function as a “master” controller, and the remaining controller(s) are programmed to function as “slave” controllers. Each controller includes a synchronous counter and control logic circuitry. The control logic generates at least one synchronization output signal based on the outputs of the counter and the programming state (i.e., master or slave) of the controller. The master controller generates a master clock signal having a synchronizing state encoded thereon and provides the master clock to the slave controller, which includes synchronization circuitry for receiving the master clock and resetting the counter based on the synchronizing state of the master clock, thereby assuring that appropriate phase relationships are maintained between the controller outputs.

Abstract: A diode emulator for a DC—DC buck converter employs a variable current ramp-based circuit that monitors the state of the phase voltage at the common node between two power switching devices. Incrementally with each pulse width modulation cycle, the diode emulator adjusts the time of turn-off of the lower power switching device, until the monitored phase voltage indicates that the emulator is effectively tracking the negative going, zero-crossing of the ripple current through an output inductor.

Abstract: A pulse width modulator (305) for driving a load in a multi-phased power system having circuitry (270) responsive to channel signals for providing an average signal by summing the channel signals at a node (221) which is coupled with a plurality of resistive elements, and having further circuitry for providing an error between said load and said reference potential, and having still further circuitry (250) for summing the channel signals, average signal, and error for providing a respective drive signal for each of the power switches, wherein the error signal and the average signal have complementary effects on a duty factor of the drive signals and the channel signal has an effect contrary to the error signal and the average signal. Further, a plurality of pulse width modulators (305) can be combined as a system (300) by connecting respective nodes (221) for providing current sharing between all phases.

Abstract: An evaluator (210) having an input (207) for receiving a signal indicative of a channel current sensed via a sensor in a mutlichannel current sharing system, and circuitry (313, 319) coupled to the input (207) and responsive to the signal for indicating an unreliable sensing for the sensor when a low current condition occurs for a time period exceeding the switching time period of the channel current. Further, the apparatus can include an additional input (207) and circuitry (313, 319) for evaluating an additional sensor sensing an additional channel current. The low current condition is characterized by thresholds corresponding to the peak level and a valley level of the channel current over a switching time period.

Abstract: A synthetic ripple regulator for a DC—DC converter generates an auxiliary voltage waveform that effectively replicates the waveform ripple current through an output inductor, and uses the auxiliary voltage waveform to control toggling of a hysteretic comparator. In a non-limiting implementation, a transconductance amplifier monitors the voltage across the inductor, and supplies an inductor voltage-representative current to a ripple waveform capacitor, so as to produce the auxiliary voltage waveform. Using the replicated inductor current for ripple regulation results in low output ripple, input voltage feed forward, and simplified compensation.

Abstract: A diode emulator for a DC-DC buck converter employs a variable current ramp-based circuit that monitors the state of the phase voltage at the common node between two power switching devices. Incrementally with each pulse width modulation cycle, the diode emulator adjusts the time of turn-off of the lower power switching device, until the monitored phase voltage indicates that the emulator is effectively tracking the negative going, zero-crossing of the ripple current through an output inductor.

Abstract: A synthetic ripple regulator for a DC-DC converter generates an auxiliary voltage waveform that effectively replicates the waveform ripple current through an output inductor, and uses the auxiliary voltage waveform to control toggling of a hysteretic comparator. In a non-limiting implementation, a transconductance amplifier monitors the voltage across the inductor, and supplies an inductor voltage-representative current to a ripple waveform capacitor, so as to produce the auxiliary voltage waveform. Using the replicated inductor current for ripple regulation results in low output ripple, input voltage feed forward, and simplified compensation.

Abstract: A synthetic ripple regulator including a synthetic ripple voltage generator that generates a synthetic ripple voltage indicative of the ripple current through an output inductor. The regulator uses the synthetically generated ripple voltage to control toggling of a hysteretic comparator for developing the pulse width modulation (PWM) signal that controls switching of the regulator. In a non-limiting implementation, a transconductance amplifier monitors the phase node voltage of the inductor and supplies an inductor voltage-representative current to a ripple capacitor, which produces the synthetic ripple voltage. Using the replicated inductor current for ripple regulation results in low output ripple, input voltage feed forward, and simplified compensation.