Patents by Inventor Stefanie Ruth Chiras

Stefanie Ruth Chiras has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7825516
    Abstract: In integrated circuit technology; an electromigration and diffusion sensitive conductor of a metal such as copper and processing procedure therefore is provided, wherein, at a planarized chemical mechanical processed interfacing surface, the conductor metal is positioned in a region of a selectable low K eff dielectric material surrounded by a material selected to be protection from outdiffusion and a source of a film thickness cap that is to form over the conductor metal and/or serve as a catalytic layer for electroless selective deposition of a CoWP capping .
    Type: Grant
    Filed: December 11, 2002
    Date of Patent: November 2, 2010
    Assignee: International Business Machines Corporation
    Inventors: Stefanie Ruth Chiras, Michael Wayne Lane, Sandra Guy Malhotra, Fenton Reed Mc Feely, Robert Rosenberg, Carlos Juan Sambucetti, Philippe Mark Vereecken
  • Patent number: 7273803
    Abstract: A ball-limiting metallurgy includes a substrate, a barrier layer formed over the substrate, an adhesion layer formed over the barrier layer, a first solderable layer formed over the adhesion layer, a diffusion barrier layer formed over the adhesion layer, and a second solderable layer formed over the diffusion barrier layer.
    Type: Grant
    Filed: December 1, 2003
    Date of Patent: September 25, 2007
    Assignee: International Business Machines Corporation
    Inventors: Yu-Ting Cheng, Stefanie Ruth Chiras, Donald W. Henderson, Sung-Kwon Kang, Stephen James Kilpatrick, Henry A. Nye, III, Carlos J. Sambucetti, Da-Yuan Shih
  • Patent number: 7084479
    Abstract: In a multilevel microelectronic integrated circuit, air comprises permanent line level dielectric and ultra low-K materials are via level dielectric. The air is supplied to line level subsequent to removal of sacrificial material by clean thermal decomposition and assisted diffusion of byproducts through porosities in the IC structure. Optionally, air is also included within porosities in the via level dielectric. By incorporating air to the extent produced in the invention, intralevel and interlevel dielectric values are minimized.
    Type: Grant
    Filed: December 8, 2003
    Date of Patent: August 1, 2006
    Assignee: International Business Machines Corporation
    Inventors: Shyng-Tsong Chen, Stefanie Ruth Chiras, Matthew Earl Colburn, Timothy Joseph Dalton, Jeffrey Curtis Hedrick, Elbert Emin Huang, Kaushik Arun Kumar, Michael Wayne Lane, Kelly Malone, Chandrasekhar Narayan, Satyanarayana Venkata Nitta, Sampath Purushothaman, Robert Rosenburg, Christy Sensenich Tyberg, Roy RongQing Yu
  • Publication number: 20040113277
    Abstract: In integrated circuit technology; an electromigration and diffusion sensitive conductor of a metal such as copper and processing procedure therefore is provided, wherein, at a planarized chemical mechanical processed interfacing surface, the conductor metal is positioned in a region of a selectable low K eff dielectric material surrounded by a material selected to be protection from outdiffusion and a source of a film thickness cap that is to form over the conductor metal and/or serve as a catalytic layer for electroless selective deposition of a CoWP capping layer.
    Type: Application
    Filed: December 11, 2002
    Publication date: June 17, 2004
    Inventors: Stefanie Ruth Chiras, Michael Wayne Lane, Sandra Guy Malhotra, Fenton Reed Mc Feely, Robert Rosenberg, Carlos Juan Sambucetti, Philippe Mark Vereecken