Patents by Inventor Stefano Guerrieri

Stefano Guerrieri has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11929385
    Abstract: A method for forming a pixelated optoelectronic stack comprises forming a stacked layer structure that comprises a bottom electrode layer, an optoelectronic layer over the bottom electrode layer, and a patterned hard-mask comprising a pattern over the optoelectronic layer. The method comprises replicating the pattern into the optoelectronic layer and the bottom electrode layer, thereby forming a first intermediate pixelated stack comprising at least two islands of stack separated from one another by stack-free areas; providing an electrically insulating layer on the first intermediate pixelated stack; removing a top portion of the electrically insulating layer and removing any remaining hard-mask so that a top surface of the electrically insulating layer is coplanar with an exposed top surface of the first intermediate pixelated stack, yielding a second intermediate pixelated stack; and forming a top transparent electrode layer over the second intermediate pixelated stack.
    Type: Grant
    Filed: July 2, 2021
    Date of Patent: March 12, 2024
    Assignee: Imec vzw
    Inventors: Yunlong Li, Stefano Guerrieri, Ming Mao, Luis Moreno Hagelsieb
  • Publication number: 20240006436
    Abstract: An image sensor, comprises a three-dimensional integrated circuit comprising a stack with at least a top-, a middle-, and a bottom-tier. The bottom-tier (BTR) comprises a first array of photodetectors, denoted first pixels (PD1), and the first pixels being sensitive in the visual and/or near-infrared spectral range. The middle-tier (MTR) comprises a second array of photodetectors, denoted second pixels (PD2), and the second pixels being sensitive in the short-wave infrared spectral range. The top-tier (TTR) comprises an application-specific integrated circuit, denoted ASIC, operable to read out the arrays of the first and second photodiodes (PD1, PD2).
    Type: Application
    Filed: June 29, 2022
    Publication date: January 4, 2024
    Applicant: ams Sensors USA Inc.
    Inventors: Muhammad Maksudur RAHMAN, Ananth TAMMA, Stefano GUERRIERI
  • Patent number: 11282702
    Abstract: The present invent provides a method comprising forming a first wafer comprising a first substrate of a group IV semiconductor, and a group III-V semiconductor device structure formed by selective area epitaxial growth on a surface portion of a front side of the first substrate. The method further comprises forming a second wafer comprising a second substrate of a group IV semiconductor, and a group IV semiconductor device structure formed on a front side of the second substrate, and bonding the first wafer to the second wafer with the front side of the first substrate facing the front side of the second wafer.
    Type: Grant
    Filed: October 12, 2020
    Date of Patent: March 22, 2022
    Assignee: IMEC VZW
    Inventors: Philippe Soussan, Vasyl Motsnyi, Luc Haspeslagh, Stefano Guerrieri, Olga Syshchyk, Bernardette Kunert, Robert Langer
  • Publication number: 20220005862
    Abstract: A method for forming a pixelated optoelectronic stack comprises forming a stacked layer structure that comprises a bottom electrode layer, an optoelectronic layer over the bottom electrode layer, and a patterned hard-mask comprising a pattern over the optoelectronic layer. The method comprises replicating the pattern into the optoelectronic layer and the bottom electrode layer, thereby forming a first intermediate pixelated stack comprising at least two islands of stack separated from one another by stack-free areas; providing an electrically insulating layer on the first intermediate pixelated stack; removing a top portion of the electrically insulating layer and removing any remaining hard-mask so that a top surface of the electrically insulating layer is coplanar with an exposed top surface of the first intermediate pixelated stack, yielding a second intermediate pixelated stack; and forming a top transparent electrode layer over the second intermediate pixelated stack.
    Type: Application
    Filed: July 2, 2021
    Publication date: January 6, 2022
    Inventors: Yunlong Li, Stefano Guerrieri, Ming Mao, Luis Moreno Hagelsieb
  • Publication number: 20210111021
    Abstract: The present invent provides a method comprising forming a first wafer comprising a first substrate of a group IV semiconductor, and a group III-V semiconductor device structure formed by selective area epitaxial growth on a surface portion of a front side of the first substrate. The method further comprises forming a second wafer comprising a second substrate of a group IV semiconductor, and a group IV semiconductor device structure formed on a front side of the second substrate, and bonding the first wafer to the second wafer with the front side of the first substrate facing the front side of the second wafer.
    Type: Application
    Filed: October 12, 2020
    Publication date: April 15, 2021
    Inventors: Philippe SOUSSAN, Vasyl MOTSNYI, Luc HASPESLAGH, Stefano GUERRIERI, Olga SYSHCHYK, Bernardette KUNERT, Robert LANGER
  • Patent number: 10377615
    Abstract: This invention relates to a sectional hydraulic valve and a truck mounted forklift incorporating the distributor. The sectional hydraulic valve comprises an inlet cover, a plurality of hydraulic sections and an end cap. The hydraulic sections each having a pump gallery, a tank gallery, an A port, a B port, a spool and a remote pilot gallery. The end cap comprises a pump port coupled to the pump gallery, a tank port coupled to the tank gallery and a connecting conduit between the pump port and the tank port. The end cap further comprises a remote pilot gallery port coupled to the remote pilot gallery, a fluid passageway between the remote pilot gallery port and the connecting conduit, and a valve assembly operable to selectively permit or restrict flow of hydraulic fluid between the connecting conduit in the end cap and the remote pilot gallery in the hydraulic section.
    Type: Grant
    Filed: March 31, 2017
    Date of Patent: August 13, 2019
    Assignees: Cargotec Research & Development Ireland Limited, Bucher Hydraulics SpA
    Inventors: Kevin Turnbull, Luca Taddia, Stefano Guerrieri
  • Publication number: 20170283227
    Abstract: This invention relates to a sectional hydraulic valve and a truck mounted forklift incorporating the distributor. The sectional hydraulic valve comprises an inlet cover, a plurality of hydraulic sections and an end cap. The hydraulic sections each having a pump gallery, a tank gallery, an A port, a B port, a spool and a remote pilot gallery. The end cap comprises a pump port coupled to the pump gallery, a tank port coupled to the tank gallery and a connecting conduit between the pump port and the tank port. The end cap further comprises a remote pilot gallery port coupled to the remote pilot gallery, a fluid passageway between the remote pilot gallery port and the connecting conduit, and a valve assembly operable to selectively permit or restrict flow of hydraulic fluid between the connecting conduit in the end cap and the remote pilot gallery in the hydraulic section.
    Type: Application
    Filed: March 31, 2017
    Publication date: October 5, 2017
    Inventors: Kevin Turnbull, Luca Taddia, Stefano Guerrieri
  • Patent number: D969597
    Type: Grant
    Filed: October 2, 2019
    Date of Patent: November 15, 2022
    Assignee: SPACE MATTERS S.R.L.
    Inventors: Stefano Guerrieri, Mirco Bonilauri