Patents by Inventor Stefano LORENZINI

Stefano LORENZINI has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • MODEL-DRIVEN APPROACH FOR FAILURE MODE, EFFECTS, AND DIAGNOSTIC ANALYSIS (FMEDA) AUTOMATION FOR HARDWARE INTELLECTUAL PROPERTY OF COMPLEX ELECTRONIC SYSTEMS
    Publication number: 20230342538
    Abstract: Failure mode, effects, and diagnostic analysis (FMEDA) is performed on hardware Intellectual Property (IP) of an electronic system. The analysis includes accessing a library of safety library components, each safety library component containing failure mode characterizations and safety data about a hardware model; and compiling the safety library components and the hardware IP. The compiling includes mapping instances of hardware models in the hardware IP to corresponding safety library components and aggregating the characterizations and safety data of the corresponding components.
    Type: Application
    Filed: April 16, 2023
    Publication date: October 26, 2023
    Applicant: ARTERIS, INC.
    Inventors: Stefano LORENZINI, Benoit de LESCURE
  • Failure mode analysis for circuit design
    Patent number: 11630938
    Abstract: Various embodiments provide for failure mode analysis of a circuit design, which can be used as part of electronic design automation (EDA). In particular, some embodiments provide for failure mode analysis of a circuit design by determining a set of functional primitives of a circuit design component (e.g., cell at gate level) that contribute to a root cause logic for a specific failure mode.
    Type: Grant
    Filed: November 4, 2019
    Date of Patent: April 18, 2023
    Assignee: Cadence Design Systems, Inc.
    Inventors: Stefano Lorenzini, Antonino Armato
  • Method of executing programs in an electronic system for applications with functional safety comprising a plurality of processors, corresponding system and computer program product
    Patent number: 10248492
    Abstract: A method for executing programs (P) in an electronic system for applications provided with functional safety that includes a single-processor or multiprocessor processing system and a further independent control module, the method comprising: performing an operation of breaking-down of a program (P) into a plurality of parallel sub-programs (P1, . . . , Pn); assigning execution of each parallel sub-program (P1, . . . , Pn) to a respective processing module of the system, periodically performing self-test operations (Astl, Asys, Achk) associated to each of said sub-programs (P1, . . . , Pn).
    Type: Grant
    Filed: July 31, 2015
    Date of Patent: April 2, 2019
    Assignee: Intel Corporation
    Inventors: Riccardo Mariani, Michele Borgatti, Stefano Lorenzini
  • METHOD OF EXECUTING PROGRAMS IN AN ELECTRONIC SYSTEM FOR APPLICATIONS WITH FUNCTIONAL SAFETY COMPRISING A PLURALITY OF PROCESSORS, CORRESPONDING SYSTEM AND COMPUTER PROGRAM PRODUCT
    Publication number: 20170228279
    Abstract: A method for executing programs (P) in an electronic system for applications provided with functional safety that includes a single-processor or multiprocessor processing system and a further independent control module, the method comprising: performing an operation of breaking-down of a program (P) into a plurality of parallel sub-programs (P1, . . . , Pn); assigning execution of each parallel sub-program (P1, . . . , Pn) to a respective processing module of the system, periodically performing self-test operations (Astl, Asys, Achk) associated to each of said sub-programs (P1, . . .
    Type: Application
    Filed: July 31, 2015
    Publication date: August 10, 2017
    Inventors: Riccardo MARIANI, Michele BORGATTI, Stefano LORENZINI