Patents by Inventor Stefano Pellerano

Stefano Pellerano has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • COMMUNICATION DEVICE
    Publication number: 20250150103
    Abstract: Various aspects provide a transceiver and a communication device including the transceiver. In an example, the transceiver includes an amplifier circuit including an amplifier stage with an adjustable degeneration component, the amplifier stage configured to amplify a received input signal with an adjustable gain, an adjustable feedback component coupled to the amplifier stage; and a controller coupled to the amplifier stage and to the adjustable feedback component and configured to adjust the adjustable feedback component based on an adjustment of the adjustable degeneration component.
    Type: Application
    Filed: December 19, 2024
    Publication date: May 8, 2025
    Inventors: Abhishek AGRAWAL, Ritesh A. BHAT, Steven CALLENDER, Brent R. CARLTON, Christopher D. HULL, Stefano PELLERANO, Mustafijur RAHMAN, Peter SAGAZIO, Woorim SHIN
  • Calibration for DTC fractional frequency synthesis
    Patent number: 12278643
    Abstract: A digital-to-time converter (DTC)-based open loop frequency synthesis and calibration circuit may be used to provide a precise clock signal. The DTC calibration circuit may include a DTC to generate a DTC clock signal based on a received input clock frequency and a received initial digital input code, a phase-lock loop (PLL) to generate a PLL clock signal based on a received PLL input, a binary phase-detector (PD) to generate a PD output based on a comparison between the DTC clock signal and the PLL clock signal, a plurality of calibration bins to generate a signed accumulated PD portion based on the PD output, and an adder to generate a calibrated DTC input code based on a combination of the signed accumulated PD portion and a subsequent digital input code, where the DTC generates a calibrated clock signal based on the calibrated DTC input code.
    Type: Grant
    Filed: September 22, 2021
    Date of Patent: April 15, 2025
    Assignee: Intel Corporation
    Inventors: Somnath Kundu, Stefano Pellerano, Brent R. Carlton
  • Technologies for on-circuit board de-embedding
    Patent number: 12259430
    Abstract: Technologies for on-circuit board de-embedding are disclosed. In the illustrative embodiment, several micromechanical relays on a circuit board can connect a trace on the circuit board to an open circuit, a closed circuit, a load circuit, or a through circuit. For the through circuit, the trace is connected to an integrated circuit component mounted on the circuit board. A cable is connected to the trace, allowing for signals to be sent to any of the four circuits without any probes connected to the circuit board. The transmitted and/or reflected signals can be measured, which can be used to de-embed the integrated circuit component.
    Type: Grant
    Filed: July 22, 2022
    Date of Patent: March 25, 2025
    Assignee: Intel Corporation
    Inventors: Bishnu Prasad Patra, Stefano Pellerano
  • Scalable gate control in quantum circuit assemblies
    Patent number: 12248848
    Abstract: Quantum circuit assemblies that employ active pulse shaping in order to be able to control states of a plurality of qubits with signal pulses propagated over a shared signal propagation channel are disclosed. An example quantum circuit assembly includes a quantum circuit component that includes a first qubit, associated with a first frequency to control the state of the first qubit, and a second qubit, associated with a second frequency to control the state of the second qubit. A shared transmission channel is coupled to the first and second qubits. The assembly further includes a signal pulse generation circuit, configured to generate a signal pulse to be propagated over the shared transmission channel to control the state of the first qubit, where the signal pulse has a center frequency at the first frequency, a bandwidth that includes the second frequency, and a notch at the second frequency.
    Type: Grant
    Filed: June 7, 2021
    Date of Patent: March 11, 2025
    Assignee: Intel Corporation
    Inventors: Sushil Subramanian, Stefano Pellerano, Ravi Pillarisetty, Jong Seok Park, Todor M. Mladenov
  • Wireless communication technology, apparatuses, and methods
    Patent number: 12237589
    Abstract: Millimeter wave (mmWave) technology, apparatuses, and methods that relate to transceivers, receivers, and antenna structures for wireless communications are described. The various aspects include co-located millimeter wave (mmWave) and near-field communication (NFC) antennas, scalable phased array radio transceiver architecture (SPARTA), phased array distributed communication system with MIMO support and phase noise synchronization over a single coax cable, communicating RF signals over cable (RFoC) in a distributed phased array communication system, clock noise leakage reduction, IF-to-RF companion chip for backwards and forwards compatibility and modularity, on-package matching networks, 5G scalable receiver (Rx) architecture, among others.
    Type: Grant
    Filed: May 2, 2022
    Date of Patent: February 25, 2025
    Assignee: Intel Corporation
    Inventors: Erkan Alpman, Arnaud Lucres Amadjikpe, Omer Asaf, Kameran Azadet, Rotem Banin, Miroslav Baryakh, Anat Bazov, Stefano Brenna, Bryan K. Casper, Anandaroop Chakrabarti, Gregory Chance, Debabani Choudhury, Emanuel Cohen, Claudio Da Silva, Sidharth Dalmia, Saeid Daneshgar Asl, Kaushik Dasgupta, Kunal Datta, Brandon Davis, Ofir Degani, Amr M. Fahim, Amit Freiman, Michael Genossar, Eran Gerson, Eyal Goldberger, Eshel Gordon, Meir Gordon, Josef Hagn, Shinwon Kang, Te Yu Kao, Noam Kogan, Mikko S. Komulainen, Igal Yehuda Kushnir, Saku Lahti, Mikko M. Lampinen, Naftali Landsberg, Wook Bong Lee, Run Levinger, Albert Molina, Resti Montoya Moreno, Tawfiq Musah, Nathan G. Narevsky, Hosein Nikopour, Oner Orhan, Georgios Palaskas, Stefano Pellerano, Ron Pongratz, Ashoke Ravi, Shmuel Ravid, Peter Andrew Sagazio, Eren Sasoglu, Lior Shakedd, Gadi Shor, Baljit Singh, Menashe Soffer, Ra'anan Sover, Shilpa Talwar, Nebil Tanzi, Moshe Teplitsky, Chintan S. Thakkar, Jayprakash Thakur, Avi Tsarfati, Yossi Tsfati, Marian Verhelst, Nir Weisman, Shuhei Yamada, Ana M. Yepes, Duncan Kitchin
  • Communication device
    Patent number: 12212351
    Abstract: Various aspects provide a transceiver and a communication device including the transceiver. In an example, the transceiver includes an amplifier circuit including an amplifier stage with an adjustable degeneration component, the amplifier stage configured to amplify a received input signal with an adjustable gain, an adjustable feedback component coupled to the amplifier stage; and a controller coupled to the amplifier stage and to the adjustable feedback component and configured to adjust the adjustable feedback component based on an adjustment of the adjustable degeneration component.
    Type: Grant
    Filed: December 23, 2020
    Date of Patent: January 28, 2025
    Assignee: Intel Corporation
    Inventors: Abhishek Agrawal, Ritesh A. Bhat, Steven Callender, Brent R. Carlton, Christopher D. Hull, Stefano Pellerano, Mustafijur Rahman, Peter Sagazio, Woorim Shin
  • Closed-loop baud rate carrier and carrier frequency tuning for wireless chip-to-chip interface
    Patent number: 12212510
    Abstract: Various aspects of this disclosure provide a receiver. The receiver may include a down-converter configured to down-convert a received communication signal at a predefined carrier frequency, with a reference signal received from a reference signal generator, and a processor configured to perform a signal quality detection to identify a signal quality metric of the received communication signal at the predefined carrier frequency, and to provide a frequency adjusting signal to the reference signal generator to change the frequency of the reference signal based on the performed signal quality detection to identify the signal quality metric of the received communication signal at the predefined carrier frequency.
    Type: Grant
    Filed: December 17, 2020
    Date of Patent: January 28, 2025
    Assignee: Intel Corporation
    Inventors: Peter Sagazio, Chun C. Lee, Stefano Pellerano, Christopher D. Hull
  • ANTENNA MODULES WITH PARTIALLY OVERLAPPING STACKED CIRCUITS
    Publication number: 20250006719
    Abstract: Example antenna module includes antenna units provided over an antenna unit support, and ICs communicatively coupled to various antenna units. The ICs are arranged in two or more subsets of one or more ICs in each subset, where an individual IC belongs to only one subset, different subsets are in different layers with respect to the antenna unit support, and an average pitch of projections of all of the ICs onto a plane parallel to the antenna unit support is substantially equal to, or smaller, than an average pitch of the antenna units. When an average width of the ICs is larger than the average pitch of the antenna units, arranging the ICs in two or more subsets in different layers means that at least one of the ICs of one subset partially overlaps with at least one of the ICs of another subset.
    Type: Application
    Filed: June 27, 2023
    Publication date: January 2, 2025
    Applicant: Intel Corporation
    Inventors: Georgios Panagopoulos, Richard Geiger, Steven Callender, Georgios Dogiamis, Manisha Dutta, Stefano Pellerano
  • AMPLIFIER AND MIXER IN A III-V MATERIAL FOR WIDEBAND SUB-TERAHERTZ COMMUNICATION
    Publication number: 20250006667
    Abstract: Embodiments herein relate to systems, apparatuses, or processes directed to a package for wideband sub-terahertz communication, where the package includes a mixer and an amplifier, such as a power amplifier or a low noise amplifier, that are implemented within a layer of III-V material. Other embodiments may be described and/or claimed.
    Type: Application
    Filed: June 27, 2023
    Publication date: January 2, 2025
    Inventors: Georgios PANAGOPOULOS, Steven CALLENDER, Richard GEIGER, Georgios C. DOGIAMIS, Manisha DUTTA, Stefano PELLERANO
  • RADAR APPARATUS, SYSTEM, AND METHOD
    Publication number: 20240361443
    Abstract: Some demonstrative aspects include radar apparatuses, devices, systems and methods. In one example, an apparatus may include a plurality of Transmit (Tx) chains to transmit radar Tx signals, and a plurality of Receive (Rx) chains to process radar Rx signals. For example, the radar Rx signals may be based on the radar Tx signals. The apparatus may be implemented, for example, as part of a radar device, for example, as part of a vehicle including the radar device. In other aspects, the apparatus may include any other additional or alternative elements and/or may be implemented as part of any other device.
    Type: Application
    Filed: June 29, 2024
    Publication date: October 31, 2024
    Applicant: Intel Corporation
    Inventors: Woorim Shin, Naftali Landsberg, Stefano Pellerano
  • QUANTUM DOT BASED QUBIT DEVICES WITH ON-CHIP MICROCOIL ARRANGEMENTS
    Publication number: 20240330726
    Abstract: An array of quantum dot qubits (e.g., an array of spin qubits) relies on a gradient magnetic field to ensure that the qubits are separated in frequency in order to be individually addressable. Furthermore, a strong magnetic field gradient is required to electrically drive the electric dipole spin resonance (EDSR) of the qubits. Quantum dot devices disclosed herein use microcoil arrangements for providing a gradient magnetic field, the microcoil arrangements integrated on the same chip (e.g., on the same die or wafer) as quantum dot qubits themselves. Unlike previous approaches to quantum dot formation and manipulation, various embodiments of the quantum dot devices disclosed herein may enable improved control over magnetic fields and their gradients to realize better frequency targeting of individual qubits, help minimize adverse effects of charge noise on qubit decoherence and provide good scalability in the number of quantum dots included in the device.
    Type: Application
    Filed: June 12, 2024
    Publication date: October 3, 2024
    Applicant: Intel Corporation
    Inventors: Florian Luethi, Hubert C. George, Felix Frederic Leonhard Borjans, Simon Schaal, Lester Lampert, Thomas Francis Watson, Jeanette M. Roberts, Jong Seok Park, Sushil Subramanian, Stefano Pellerano
  • Dispersive waveguide crosstalk mitigation
    Patent number: 12088360
    Abstract: Embodiments may relate to a baseband module with communication pathways for a first data signal and a second data signal. The baseband module may also include a finite impulse response (FIR) filter in a communication path between the first signal input and the second signal output. Other embodiments may be described or claimed.
    Type: Grant
    Filed: June 9, 2020
    Date of Patent: September 10, 2024
    Assignee: Intel Corporation
    Inventors: Henning Braunisch, Georgios Dogiamis, Diego Correas-Serrano, Neelam Prabhu Gaunkar, Telesphor Kamgaing, Cooper S. Levy, Chintan S. Thakkar, Stefano Pellerano
  • Radar apparatus, system, and method
    Patent number: 12066517
    Abstract: Some demonstrative aspects include radar apparatuses, devices, systems and methods. In one example, an apparatus may include a plurality of Transmit (Tx) chains to transmit radar Tx signals, and a plurality of Receive (Rx) chains to process radar Rx signals. For example, the radar Rx signals may be based on the radar Tx signals. The apparatus may be implemented, for example, as part of a radar device, for example, as part of a vehicle including the radar device. In other aspects, the apparatus may include any other additional or alternative elements and/or may be implemented as part of any other device.
    Type: Grant
    Filed: May 20, 2021
    Date of Patent: August 20, 2024
    Assignee: INTEL CORPORATION
    Inventors: Naftali Landsberg, Woorim Shin, Dan Ohev Zion, Meir Gordon, Omer Asaf, Danniel Nahmanny, Mustafijur Rahman, Stefano Pellerano
  • Quantum dot based qubit devices with on-chip microcoil arrangements
    Patent number: 12050966
    Abstract: An array of quantum dot qubits (e.g., an array of spin qubits) relies on a gradient magnetic field to ensure that the qubits are separated in frequency in order to be individually addressable. Furthermore, a strong magnetic field gradient is required to electrically drive the electric dipole spin resonance (EDSR) of the qubits. Quantum dot devices disclosed herein use microcoil arrangements for providing a gradient magnetic field, the microcoil arrangements integrated on the same chip (e.g., on the same die or wafer) as quantum dot qubits themselves. Unlike previous approaches to quantum dot formation and manipulation, various embodiments of the quantum dot devices disclosed herein may enable improved control over magnetic fields and their gradients to realize better frequency targeting of individual qubits, help minimize adverse effects of charge noise on qubit decoherence and provide good scalability in the number of quantum dots included in the device.
    Type: Grant
    Filed: December 20, 2021
    Date of Patent: July 30, 2024
    Assignee: Intel Corporation
    Inventors: Florian Luethi, Hubert C. George, Felix Frederic Leonhard Borjans, Simon Schaal, Lester Lampert, Thomas Francis Watson, Jeanette M. Roberts, Jong Seok Park, Sushil Subramanian, Stefano Pellerano
  • WIRELESS COMMUNICATION TECHNOLOGY, APPARATUSES, AND METHODS
    Publication number: 20240243477
    Abstract: Millimeter wave (mmWave) technology, apparatuses, and methods that relate to transceivers, receivers, and antenna structures for wireless communications are described. The various aspects include co-located millimeter wave (mmWave) and near-field communication (NFC) antennas, scalable phased array radio transceiver architecture (SPARTA), phased array distributed communication system with MIMO support and phase noise synchronization over a single coax cable, communicating RF signals over cable (RFoC) in a distributed phased array communication system, clock noise leakage reduction, IF-to-RF companion chip for backwards and forwards compatibility and modularity, on-package matching networks, 5G scalable receiver (Rx) architecture, among others.
    Type: Application
    Filed: February 15, 2024
    Publication date: July 18, 2024
    Inventors: Erkan Alpman, Arnaud Lucres Amadjikpe, Omer Asaf, Kameran Azadet, Rotem Banin, Miroslav Baryakh, Anat Bazov, Stefano Brenna, Bryan K. Casper, Anandaroop Chakrabarti, Gregory Chance, Debabani Choudhury, Emanuel Cohen, Claudio Da Silva, Sidharth Dalmia, Saeid Daneshgar Asl, Kaushik Dasgupta, Kunal Datta, Ofir Degani, Amr M. Fahim, Amit Freiman, Michael Genossar, Eran Gerson, Eyal Goldberger, Eshel Gordon, Meir Gordon, Josef Hagn, Shinwon Kang, Te Yu Kao, Noam Kogan, Mikko S. Komulainen, Igal Yehuda Kushnir, Saku Lahti, Mikko M. Lampinen, Naftali Landsberg, Wook Bong Lee, Run Levinger, Albert Molina, Resti Montoya Moreno, Tawfiq Musah, Nathan G. Narevsky, Hosein Nikopour, Oner Orhan, Georgios Palaskas, Stefano Pellerano, Ron Pongratz, Ashoke Ravi, Shmuel Ravid, Peter Andrew Sagazio, Eren Sasoglu, Lior Shakedd, Gadi Shor, Baljit Singh, Menashe Soffer, Ra'anan Sover, Shilpa Talwar, Nebil Tanzi, Moshe Teplitsky, Chintan S. Thakkar, Jayprakash Thakur, Avi Tsarfati, Marian Verhelst, Yossi Tsfati, Nir Weisman, Shuhei Yamada, Ana M. Yepes, Duncan Kitchin
  • Technologies for reduction of memory effects in a capacitor for qubit gate control
    Patent number: 12009813
    Abstract: Technologies for the reduction of memory effects in a capacitor are disclosed. In the illustrative embodiment, a companion chip is connected to a quantum processor. The companion chip provides voltages to gates of qubits on the quantum processor. The companion chip includes an array of capacitors that can be charged to a voltage based on a voltage to be applied to a gate of the quantum processor. The capacitors in the array of capacitors are connected to the gate one at a time, charging up a parasitic capacitance. As more capacitors are switched, the voltage on the gate approaches a target voltage with an exponentially-decreasing voltage error.
    Type: Grant
    Filed: May 27, 2022
    Date of Patent: June 11, 2024
    Assignee: Intel Corporation
    Inventors: Sushil Subramanian, Stefano Pellerano, Todor Mladenov, JongSeok Park, Bishnu Prasad Patra
  • Wireless communication technology, apparatuses, and methods
    Patent number: 11955732
    Abstract: Millimeter wave (mmWave) technology, apparatuses, and methods that relate to transceivers, receivers, and antenna structures for wireless communications are described. The various aspects include co-located millimeter wave (mmWave) and near-field communication (NFC) antennas, scalable phased array radio transceiver architecture (SPARTA), phased array distributed communication system with MIMO support and phase noise synchronization over a single coax cable, communicating RF signals over cable (RFoC) in a distributed phased array communication system, clock noise leakage reduction, IF-to-RF companion chip for backwards and forwards compatibility and modularity, on-package matching networks, 5G scalable receiver (Rx) architecture, among others.
    Type: Grant
    Filed: December 27, 2022
    Date of Patent: April 9, 2024
    Assignee: Intel Corporation
    Inventors: Erkan Alpman, Arnaud Lucres Amadjikpe, Omer Asaf, Kameran Azadet, Rotem Banin, Miroslav Baryakh, Anat Bazov, Stefano Brenna, Bryan K. Casper, Anandaroop Chakrabarti, Gregory Chance, Debabani Choudhury, Emanuel Cohen, Claudio Da Silva, Sidharth Dalmia, Saeid Daneshgar Asl, Kaushik Dasgupta, Kunal Datta, Brandon Davis, Ofir Degani, Amr M. Fahim, Amit Freiman, Michael Genossar, Eran Gerson, Eyal Goldberger, Eshel Gordon, Meir Gordon, Josef Hagn, Shinwon Kang, Te Yu Kao, Noam Kogan, Mikko S. Komulainen, Igal Yehuda Kushnir, Saku Lahti, Mikko M. Lampinen, Naftali Landsberg, Wook Bong Lee, Run Levinger, Albert Molina, Resti Montoya Moreno, Tawfiq Musah, Nathan G. Narevsky, Hosein Nikopour, Oner Orhan, Georgios Palaskas, Stefano Pellerano, Ron Pongratz, Ashoke Ravi, Shmuel Ravid, Peter Andrew Sagazio, Eren Sasoglu, Lior Shakedd, Gadi Shor, Baljit Singh, Menashe Soffer, Ra'anan Sover, Shilpa Talwar, Nebil Tanzi, Moshe Teplitsky, Chintan S. Thakkar, Jayprakash Thakur, Avi Tsarfati, Yossi Tsfati, Marian Verhelst, Nir Weisman, Shuhei Yamada, Ana M. Yepes, Duncan Kitchin
  • Equalization and estimation processing in wireless devices
    Patent number: 11956104
    Abstract: Millimeter-wave (mmWave) and sub-mmWave technology, apparatuses, and methods that relate to transceivers and receivers for wireless communications are described. The various aspects include an apparatus of a communication device including one or more antennas configured to receive an RF signal and an ADC system. The ADC system includes a 1-bit ADC configured to receive the RF signal, and an ADC controller circuitry configured to measure a number of positive samples in the received RF signal for a plurality of thresholds of the 1-bit ADC, estimate receive signal power associated with the received RF signal based on the measured number of positive samples, determine a direct current (DC) offset in the received RF signal using the estimated received signal power, and adjust the received RF signal based on the determined DC offset.
    Type: Grant
    Filed: December 26, 2019
    Date of Patent: April 9, 2024
    Assignee: Intel Corporation
    Inventors: Oner Orhan, Hosein Nikopour, Mehnaz Rahman, Ivan Simoes Gaspar, Shilpa Talwar, Stefano Pellerano, Claudio Da Silva, Namyoon Lee, Yo Seb Jeon, Eren Sasoglu
  • Technologies for a high-voltage transmission gate
    Patent number: 11955965
    Abstract: Technologies for a high-voltage transmission gate are disclosed. In the illustrative embodiment, a companion chip is connected to a quantum processor. The companion chip provides voltages to gates of qubits on the quantum processor. The companion chip includes one or more high-voltage transmission gates that can be used to charge capacitors linked to gates of qubits on the quantum processor. The transmission gate includes transistors with a breakdown voltage less than a range of input and output voltages of the transmission gate. Control circuitry on the companion chip controls the voltages applied to transistors of the transmission gate to ensure that the voltage differences across the terminals of each transistor is below a breakdown voltage.
    Type: Grant
    Filed: May 27, 2022
    Date of Patent: April 9, 2024
    Assignee: Intel Corporation
    Inventors: Sushil Subramanian, Stefano Pellerano, Todor Mladenov, JongSeok Park, Bishnu Prasad Patra
  • ANALOG-TO-DIGITAL CONVERTER, RECEIVER, BASE STATION, MOBILE DEVICE AND METHOD FOR A TIME-INTERLEAVED ANALOG-TO-DIGITAL CONVERTER
    Publication number: 20240097693
    Abstract: An analog-to-digital converter, ADC, is provided. The ADC comprises multiple time-interleaved sub-ADCs, a detection circuit, and a calibration circuit. The sub-ADCs are configured to, when the ADC is in a calibration mode, generate a first signal by sampling a calibration signal based on a first clock signal and at least a second clock signal. The first clock signal comprises a phase shift relative to the second clock signal. The calibration circuit is configured to determine a first mismatch between the phase shift and a phase shift threshold based on the first signal. The detection circuit is configured to, when the ADC is in an operation mode, generate a second signal by sampling one of a biased signal to be received by the sub-ADCs or a second calibration signal based on at least one of the first clock signal and the second clock signal.
    Type: Application
    Filed: September 20, 2022
    Publication date: March 21, 2024
    Inventors: Somnath KUNDU, Amy L. WHITCOMBE, Stefano PELLERANO, Peter SAGAZIO, Brent CARLTON