Abstract: Method (1) of deposition of at least one layer of at least one precursor of Perovskite on at least one substrate (4), through use of at least one deposition chamber (2), wherein the deposition chamber (2) is operatively connected to at least one vacuum pump (3); houses at least one source (5, 5?), the at least one source (5, 5?) being configured to receive at least one precursor of said Perovskite and said at least one source (5, 5?) having at least one delivery mouth (51, 51?), to let one gas of the at least one precursor of said Perovskite, when obtained into source (5, 5?), pass directly from the at least one source (5, 5?) into the at least one deposition chamber (2); and the deposition chamber (2) houses at least one supporting device (6) for the substrate (4), the supporting device (6) being configured to support said substrate (4) between at least one working position, wherein that substrate (4) is aligned with the at least one delivery mouth (51, 51?) of the at least one source (5, 5?), at a preset de

Abstract: Charge pumps of integrated circuit devices might include an input configured to receive an internally-generated first voltage level, an output, and a plurality of stages between its input and output. A particular stage might include a voltage isolation device, a voltage driver, and a capacitance having a first electrode connected to an output of the voltage driver and a second electrode connected to the voltage isolation device. The voltage driver might be responsive to a clock signal and to a voltage level of the output of the voltage driver to selectively connect the output of the voltage driver to either a first voltage node configured to receive the first voltage level, a second voltage node configured to receive a second voltage level lower than the first voltage level, or a third voltage node configured to receive a third voltage level lower than the second voltage level.

Abstract: A machine for the deposition of material on a substrate by the cathodic sputtering technique is provided, of the type provided with a cathode assembly having a tubular support extending substantially along a first axis (A), and a plurality of magnetic elements constrained to the tubular support and spaced from one another along the first axis (A), and wherein each of the magnetic elements has at least one second axis (M) of magnetic orientation, linking the respective magnetic poles (N; S) and has an outer side jutting from the tubular support and an inner side constrained to the tubular support, wherein the second axis (M) linking the poles of each magnetic element is transverse to the first axis (A) of the tubular support and the polarity (S; N) of the outer sides of two consecutive magnetic elements along the first axis (A) on the tubular support is alternating.

Abstract: A machine for the deposition of material on a substrate by the cathodic sputtering technique is provided, of the type provided with a cathode assembly having a tubular support extending substantially along a first axis (A), and a plurality of magnetic elements constrained to the tubular support and spaced from one another along the first axis (A), and wherein each of the magnetic elements has at least one second axis (M) of magnetic orientation, linking the respective magnetic poles (N; S) and has an outer side jutting from the tubular support and an inner side constrained to the tubular support, wherein the second axis (M) linking the poles of each magnetic element is transverse to the first axis (A) of the tubular support and the polarity (S; N) of the outer sides of two consecutive magnetic elements along the first axis (A) on the tubular support is alternating.

Abstract: Charge pumps of integrated circuit devices might include an input configured to receive an internally-generated first voltage level, an output, and a plurality of stages between its input and output. A particular stage might include a voltage isolation device, a voltage driver, and a capacitance having a first electrode connected to an output of the voltage driver and a second electrode connected to the voltage isolation device.

Abstract: Methods of operating a voltage generation circuit include applying a clock signal to an input of a voltage driver of a stage of the voltage generation circuit, connecting the output of the voltage driver to a first voltage node configured to receive a first voltage when the clock signal has a particular logic level and a voltage level of an output of the voltage driver is less than a threshold, connecting the output of the voltage driver to a second voltage node configured to receive a second voltage, greater than the first voltage, when the clock signal has the particular logic level and the voltage level of the output of the voltage driver is greater than the threshold, and connecting the output of the voltage driver to a third voltage node configured to receive a third voltage, less than the first voltage, when the clock signal has a different logic level.

Abstract: Voltage generation circuits include a stage including a voltage driver having inputs connected to respective voltage nodes and a clock signal, and a stage capacitance having a first electrode connected to an output of the voltage driver and a second electrode connected to a voltage isolation device. The voltage driver might be configured to connect its output to receive a first voltage when the clock signal has a particular logic level and a voltage level of its output is less than a threshold, to connect its output to receive a second voltage greater than the first voltage when the clock signal has the particular logic level and the voltage level of its output is greater than the threshold, and to connect its output to receive a third voltage less than the first voltage when the clock signal has a different logic level.

Abstract: Voltage generation circuits include a stage including a voltage driver having inputs connected to respective voltage nodes and a clock signal, and a stage capacitance having a first electrode connected to an output of the voltage driver and a second electrode connected to a voltage isolation device. The voltage driver might be configured to connect its output to receive a first voltage when the clock signal has a particular logic level and a voltage level of its output is less than a threshold, to connect its output to receive a second voltage greater than the first voltage when the clock signal has the particular logic level and the voltage level of its output is greater than the threshold, and to connect its output to receive a third voltage less than the first voltage when the clock signal has a different logic level.

Abstract: Methods of operating a voltage generation circuit include applying a clock signal to an input of a voltage driver of a stage of the voltage generation circuit, connecting the output of the voltage driver to a first voltage node configured to receive a first voltage when the clock signal has a particular logic level and a voltage level of an output of the voltage driver is less than a threshold, connecting the output of the voltage driver to a second voltage node configured to receive a second voltage, greater than the first voltage, when the clock signal has the particular logic level and the voltage level of the output of the voltage driver is greater than the threshold, and connecting the output of the voltage driver to a third voltage node configured to receive a third voltage, less than the first voltage, when the clock signal has a different logic level.

Abstract: Methods of operating a voltage generation circuit, and apparatus configured to perform such methods, include applying a clock signal to an input of a voltage driver of a stage of the voltage generation circuit, connecting the voltage driver output to a first voltage node configured to receive a first voltage when the clock signal has a particular logic level and a voltage level of the voltage driver output is less than a threshold, connecting the voltage driver output to a second voltage node configured to receive a second voltage greater than the first voltage when the clock signal has the particular logic level and the voltage level of the voltage driver output is greater than the threshold, and connecting the voltage driver output to a third voltage node configured to receive a third voltage less than the first voltage when the clock signal has a different logic level.

Abstract: Voltage switches, memory devices, memory systems, and methods for switching are disclosed. One such voltage switch uses a pair of switch circuits coupled in series, each switch circuit being driven by a level shift circuit. Each switch circuit uses a group of series coupled transistors with a parallel control transistor where the number of transistors in each group may be determined by an expected switch input voltage and a maximum allowable voltage drop for each transistor. A voltage of a particular state of an enable signal is shifted up to the switch input voltage by the level shift circuits. The particular state of the enable signal turns on the voltage switch such that the switch output voltage is substantially equal to the switch input voltage.

Abstract: Voltage switches, memory devices, memory systems, and methods for switching are disclosed. One such voltage switch uses a pair of switch circuits coupled in series, each switch circuit being driven by a level shift circuit. Each switch circuit uses a group of series coupled transistors with a parallel control transistor where the number of transistors in each group may be determined by an expected switch input voltage and a maximum allowable voltage drop for each transistor. A voltage of a particular state of an enable signal is shifted up to the switch input voltage by the level shift circuits. The particular state of the enable signal turns on the voltage switch such that the switch output voltage is substantially equal to the switch input voltage.

Abstract: Voltage switches, memory devices, memory systems, and methods for switching are disclosed. One such voltage switch uses a pair of switch circuits coupled in series, each switch circuit being driven by a level shift circuit. Each switch circuit uses a group of series coupled transistors with a parallel control transistor where the number of transistors in each group may be determined by an expected switch input voltage and a maximum allowable voltage drop for each transistor. A voltage of a particular state of an enable signal is shifted up to the switch input voltage by the level shift circuits. The particular state of the enable signal turns on the voltage switch such that the switch output voltage is substantially equal to the switch input voltage.

Abstract: Voltage switches, memory devices, memory systems, and methods for switching are disclosed. One such voltage switch uses a pair of switch circuits coupled in series, each switch circuit being driven by a level shift circuit. Each switch circuit uses a group of series coupled transistors with a parallel control transistor where the number of transistors in each group may be determined by an expected switch input voltage and a maximum allowable voltage drop for each transistor. A voltage of a particular state of an enable signal is shifted up to the switch input voltage by the level shift circuits. The particular state of the enable signal turns on the voltage switch such that the switch output voltage is substantially equal to the switch input voltage.

Abstract: Voltage switches, memory devices, memory systems, and methods for switching are disclosed. One such voltage switch uses a pair of switch circuits coupled in series, each switch circuit being driven by a level shift circuit. Each switch circuit uses a group of series coupled transistors with a parallel control transistor where the number of transistors in each group may be determined by an expected switch input voltage and a maximum allowable voltage drop for each transistor. A voltage of a particular state of an enable signal is shifted up to the switch input voltage by the level shift circuits. The particular state of the enable signal turns on the voltage switch such that the switch output voltage is substantially equal to the switch input voltage.