Patents by Inventor Stefano Sueri

Stefano Sueri has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8878758
    Abstract: A bidirectional switch includes a pair of transistors, with each transistor including a source connected via a degeneration resistance to a common source control node, a gate connected to a common gate control node, a drain connected to a respective channel or gate line and to a charge storage node, respectively, and a clamp diode connected between the source and the gate. This forms a single charge transfer path between gate lines sequentially activated by a scan driver of an LCD panel, and implements a charge sharing technique for reducing power dissipation.
    Type: Grant
    Filed: July 27, 2012
    Date of Patent: November 4, 2014
    Assignee: STMicroelectronics S.r.l.
    Inventors: Domenico Cristaudo, Stefano Corradi, Stefano Sueri
  • Publication number: 20130027283
    Abstract: A bidirectional switch includes a pair of transistors, with each transistor including a source connected via a degeneration resistance to a common source control node, a gate connected to a common gate control node, a drain connected to a respective channel or gate line and to a charge storage node, respectively, and a clamp diode connected between the source and the gate. This forms a single charge transfer path between gate lines sequentially activated by a scan driver of an LCD panel, and implements a charge sharing technique for reducing power dissipation.
    Type: Application
    Filed: July 27, 2012
    Publication date: January 31, 2013
    Applicant: STMICROELECTRONICS S.R.L
    Inventors: DOMENICO CRISTAUDO, Stefano Corradi, Stefano Sueri
  • Publication number: 20070024118
    Abstract: A power IGBT device is monolithically integrated to include an input terminal suitable to receive an input voltage and an output terminal suitable to supply a current having a limited and predetermined highest value. Such IGBT device includes an IGBT power element inserted between said output terminal and a supply reference. The power element has a control terminal connected to the input terminal through a control circuit that includes at least a transistor inserted between the control terminal and the supply reference voltage and a resistive element inserted between the input terminal and the control terminal.
    Type: Application
    Filed: May 22, 2006
    Publication date: February 1, 2007
    Applicant: STMicroelectronics S.r.l.
    Inventors: Antonino Torres, Stefano Sueri, Davide Patti
  • Patent number: 6127723
    Abstract: An integrated device in an emitter-switching configuration comprises a first bipolar transistor having a base region, an emitter region, and a collector region, a second transistor having a charge-collection terminal connected to an emitter terminal of the first transistor, and a quenching element having a terminal connected to a base terminal of the first transistor. The quenching element is formed within the base region or the emitter region of the first transistor.
    Type: Grant
    Filed: January 30, 1998
    Date of Patent: October 3, 2000
    Assignee: SGS-Thomson Microelectronics, S.r.l.
    Inventors: Natale Aiello, Atanasio La Barbera, Stefano Sueri, Sergio Spampinato
  • Patent number: 6084286
    Abstract: An integrated device comprises a high-voltage transistor and a low-voltage transistor in an emitter-switching configuration integrated in a chip (400) of semiconductor material comprising a buried P-type region (120) and a corresponding P-type contact region (405) which delimit a portion of semiconductor material within which the low-voltage transistor is formed. The contact region (405) has a network structure such as to divide this portion of semiconductor material into a plurality of cells (410) within each of which there is an elemental P-type base region (425) and an elemental N-type emitter region (430) of the low-voltage transistor. The elemental regions (425) and (430) of the various cells (410) are electrically connected to one another by means of surface metal contacts.
    Type: Grant
    Filed: May 28, 1997
    Date of Patent: July 4, 2000
    Assignee: SGS-Thomsom Microelectronics, S.r.l.
    Inventors: Natale Aiello, Vito Graziano, Atanasio La Barbera, Stefano Sueri
  • Patent number: 6060762
    Abstract: An integrated semiconductor structure comprises two homologous P-type regions formed within an N-type epitaxial layer. A P-type region formed in the portion of the epitaxial layer disposed between the two P-type regions includes within it an N-type region. This N region is electrically connected to the P region by means of a surface metal contact. The structure reduces the injection of current between the first and second P regions, at the same time preventing any vertical parasitic transistors from being switched on.
    Type: Grant
    Filed: May 13, 1997
    Date of Patent: May 9, 2000
    Assignee: CO.RI.M.ME. Consorzio per la Ricerca Sulla Microelettronica Nel Mezzogiorno
    Inventors: Salvatore Scaccianoce, Stefano Sueri
  • Patent number: 5986411
    Abstract: The present invention relates to an integrated circuit adapted to perform the function of a diode of the DIAC type, the circuit having an input terminal and an output terminal. The circuit includes a first input transistor having a first terminal connected to a fixed voltage reference, a second terminal, and a control terminal coupled to the input terminal of the circuit. The circuit further includes second and third transistors in a current mirror configuration, each having a first terminal for coupling to the input terminal of the circuit, and a second terminal, and associated control terminals connected together and coupled to the second terminal of the first input transistor, the second terminal of the second transistor being connected to the control terminal of the first transistor.
    Type: Grant
    Filed: February 10, 1998
    Date of Patent: November 16, 1999
    Assignee: SGS-Thomson Microelectronics S.r.l.
    Inventors: Stefano Sueri, Atanasio La Barbera, Natale Aiello, Vito Graziano
  • Patent number: 5735254
    Abstract: A circuit for use with an ignition system to enable detection of an overvoltage condition in the primary winding of an ignition coil caused by opening of a power switch connected to the primary winding. The circuit senses the overvoltage condition by comparing the voltage on the primary winding to a first threshold voltage and produces a signal at an output terminal indicative of the presence of the overvoltage condition. The output terminal is maintained at a high logic level upon detection of an overvoltage condition and throughout the time duration of the overvoltage condition, and drops to a low logic level when the voltage on the primary winding falls to a second threshold voltage, which is lower than the first threshold voltage. Comparison circuitry is provided for sensing the overvoltage condition by reference to fixed voltage values. Logic circuitry responds to the comparison circuitry to produce the appropriate logic levels at the output terminal.
    Type: Grant
    Filed: April 29, 1996
    Date of Patent: April 7, 1998
    Assignees: SGS-Thomson Microelectronics S.r.l., Consorzio per la Ricerca sulla Microelettronica nel Mezzogiorno
    Inventors: Sergio Palara, Stefano Sueri, Salvatore Scaccianoce
  • Patent number: 5636097
    Abstract: A circuit is provided for protecting against an increase in collector current for an integrated circuit containing a power switching device. The power device drives an inductive load connected to a power supply, and is connected to a control circuit for switching the power device on and off. The protection circuit contains a clamping circuit for deactivating the control circuit and switching the power device off when the current flowing through the power device reaches a preset maximum value. In addition, a circuit is provided for inhibiting the operation of the clamping circuit for a preset time interval after the power device has been switched on, and for keeping the clamping circuit in operation during voltage undershoots caused by the inductive load following the switching of the powered device off.
    Type: Grant
    Filed: June 6, 1995
    Date of Patent: June 3, 1997
    Assignee: Consorzio Per la Ricerca Sulla Microelettronica
    Inventors: Sergio Palara, Stefano Sueri
  • Patent number: 5617046
    Abstract: A diagnostic signal, indicative of the reaching of a predefined level, lower than a fixed maximum limit value, by the current flowing through a power transistor, is generated while employing a single comparator of a reference voltage with the voltage present across a sensing resistance, thus preventing problems arising from different offset characteristics of distinct comparators. By the use of current mirrors, the generation of a diagnostic signal when the current reaches a level that can be fixed very close to the maximum limit value, may be reliably triggered, irrespectively of the offset characteristic of the single comparator employed.
    Type: Grant
    Filed: July 8, 1994
    Date of Patent: April 1, 1997
    Assignees: SGS-Thomson Microelectronics, S.r.l., Consorzio per la Ricerca sulla Microelettronica nel Mezzogiorno
    Inventors: Sergio Palara, Stefano Sueri
  • Patent number: 5424666
    Abstract: A control circuit for slowly turning off a solid-state power transistor, particularly for inductive loads, comprising means for limiting the load current flowing through the switch, and timing and control circuits to ensure, irrespective of the duration of a command pulse, slowed turn-off of the switch with a predetermined delay as to the time when the maximum load current value is reached, thereby keeping the power dissipation through the switch during the load current limiting phase within predetermined values and the turn-off overvoltage within predetermined levels.
    Type: Grant
    Filed: April 26, 1994
    Date of Patent: June 13, 1995
    Assignee: Consorzio Per La Ricera Sulla Microelectronica Nel Mezzogiorno
    Inventors: Sergio Palara, Stefano Sueri, Donato Tagliavia
  • Patent number: 5424665
    Abstract: A driving circuit is provided for a power transistor connected to an inductive load. A detection resistor is placed between ground and the emitter of the power transistor. The driving circuit has a first portion which is capable of generating a first current which is a non-linear function of the voltage across the detection resistance. A second portion of the driving circuit is used to generate a base current for the power transistor that is proportional to the first current. The non-linear function of the first current compensates for the non-linear gain with respect to collector current of the power transistor.
    Type: Grant
    Filed: May 21, 1992
    Date of Patent: June 13, 1995
    Assignee: Consorzio Per La Ricerca Sulla Microelettronica Nel Mezzogiorno
    Inventors: Stefano Sueri, Sergio Palara
  • Patent number: 5142218
    Abstract: The circuit switches the power supply of the integrated circuit over to the input voltage of the switching regulator during the initial starting phase, and over to the output of said regulator once the steady state has been reached.
    Type: Grant
    Filed: October 23, 1990
    Date of Patent: August 25, 1992
    Assignee: SGS-Thomson Microelectronics S.r.l.
    Inventors: Sergio Palara, Stefano Sueri