Abstract: A bus system includes a bus and first and second bus interfaces, along with at least one data line that transmits data between the first and second bus interfaces. The bus system also includes first and second bus control devices, where the first bus control device is allocated to the first bus interface and the second bus control device is allocated to the second bus interface. First and second signaling lines signal a respective state of each of the first and second bus control devices and a third signaling line signals an exchange of data. A clock line is included that synchronizes the bus system by a clock. The first and second bus control devices each generate a control word having control information that relates to the data transmitted on the at least one data line.

Abstract: The invention relates to a bus system, comprising a bus (AIB) for exchanging data (DP) through this bus between two bus interfaces (IAIBC, EAIBC) a first bus control device and a second bus control device for controlling the exchange of data, wherein the first bus control device is allocated to the first bus interface and the second bus control device is allocated to the second bus interface; signaling lines (I-RTR and E-RTR) to signal the respective states of the first or second bus control device; a control line (CTRL) to signal an exchange of data; a data bus (DL) to transmit data (DP) between the two bus interfaces; and a clock line to synchronize the bus system by means of a clock pulse (CL).