Abstract: A semiconductor device is disclosed. At least one semiconductor chip is mounted on a substrate and is contacted to contact elements of the substrate. The encapsulation of the semiconductor chip includes the substrate, a cover and a pocket within the connected substrate and cover. The pocket is able to fix the chip in its position, and the cover is composed of the same material as the substrate.

Abstract: Packaging systems and methods for semiconductor devices are disclosed. In one embodiment, a packaging system includes a first plate having a first coefficient of thermal expansion (CTE). An integrated circuit is mountable to the first plate. The packaging system includes a second plate coupleable over the first plate over the integrated circuit. The second plate has a second CTE that is substantially a same CTE as the first CTE. A plurality of solder balls is coupleable to the first plate or the second plate and to the integrated circuit.

Abstract: Packaging systems and methods for semiconductor devices are disclosed. In one embodiment, a packaging system includes a first plate having a first coefficient of thermal expansion (CTE). An integrated circuit is mountable to the first plate. The packaging system includes a second plate coupleable over the first plate over the integrated circuit. The second plate has a second CTE that is substantially a same CTE as the first CTE. A plurality of solder balls is coupleable to the first plate or the second plate and to the integrated circuit.

Abstract: An FBGA semiconductor component has a chip side for receiving a semiconductor chip, a solder ball side for applying solder balls on ball pads, and a bonding channel embodied as an opening between the chip side and the solder ball side and serving for leading through wire bridges between the semiconductor chip and bonding islands on the solder ball side. The bonding channel has side areas extending between the chip side and the solder ball side and can be closed off with a housing part comprising potting composition. Positively locking elements for a potting composition are arranged in that region of the substrate in which the housing part is produced.

Abstract: A semiconductor device is disclosed. At least one semiconductor chip is mounted on a substrate and is contacted to contact elements of the substrate. The encapsulation of the semiconductor chip includes the substrate, a cover and a pocket within the connected substrate and cover. The pocket is able to fix the chip in its position, and the cover is composed of the same material as the substrate.

Abstract: The present invention relates to an integrated chip device in a package, including an integrated chip, a substrate comprising a redistribution wiring, a contact element and a contact pad on a common surface of the substrate, wherein the contact element is in electrical contact with the contact pad, wherein the substrate is divided in at least two parts each of which is securely attached to a respective portion of the chip to form the device, wherein between at least two of the parts of the substrate a gap is provided to accommodate a thermal expansion of at least one of the parts of the substrate, a bond wire which is provided to connect the contact pad and the further contact pad of the substrate with the integrated chip through the gap.

Abstract: Manufacturing method for an electronic component assembly and corresponding electronic component assembly The present invention provides a manufacturing method for an electronic component assembly and to a corresponding electronic component assembly.

Abstract: In a method for producing an integrated component, a carrier strip is provided with at least one arrangement of chips. A casting mold is placed over the carrier strip in such a way that the arrangement of chips is covered completely by at least one cavity of the casting mold. A protective layer is formed over the arrangement of microchips by filling the cavity with a liquefied encapsulating compound. The liquefied encapsulating compound transforms into a solid state upon cooling. The carrier strip with the protective layer can be ejected from the cavity by exerting a force onto a surface of the protective layer facing the cavity. The force is exerted onto at least one linearly extended surface region of the protective layer.

Abstract: A substrate for producing a soldering connection to a second substrate is disclosed. Soldering pads are distributed on the substrate surface. Solder balls can be applied to these pads. A soldering pad has a top side area and side areas connected to a conductor track. A soldering mask with openings in the region of the soldering pads is applied to the substrate. A soldering pad is provided with holding mechanism for the solder balls in such a way that, within the top side area of the soldering pad, a depression is introduced in the direction of the substrate or an elevation rising above the top side area is applied.

Abstract: A semiconductor component includes a substrate having a chip side and a solder ball side. A semiconductor chip is mounted on the chip side of a substrate. The semiconductor chip is electrically conductively connected to a conductor structure on the substrate. Ball pads are disposed over the solder ball side of the substrate. The ball pads are electrically conductively connected to the conductor structure and suitable for application of solder balls. A mask made from a soldering resist is disposed on the solder ball side. A sealing region at a surface of the solder ball side of the substrate is provided with seal elements for a sealing connection to an encapsulation mold on the surface of the solder ball side.

Abstract: An FBGA semiconductor component has a chip side for receiving a semiconductor chip, a solder ball side for applying solder balls on ball pads, and a bonding channel embodied as an opening between the chip side and the solder ball side and serving for leading through wire bridges between the semiconductor chip and bonding islands on the solder ball side. The bonding channel has side areas extending between the chip side and the solder ball side and can be closed off with a housing part comprising potting composition. Positively locking elements for a potting composition are arranged in that region of the substrate in which the housing part is produced.

Abstract: The invention relates to a substrate-based IC package that includes a substrate on which a chip is mounted with a die attach material. The substrate is provided with a solder resist and has, on the side opposite the chip, conductor tracks provided with soldering globules. The conductor tracks are electrically coupled to the chip via wire jumpers, which extend through a bond channel which is filled with a mold compound. The chip and the substrate are encapsulated with a mold cap on the chip side. The substrate is provided with spacers for supporting a printing template for applying the die attach material. A strip of a solder resist that surrounds at least the bond channel gaplessly with essentially the same width is provided as the spacer.

Abstract: A ball grid array package includes a substrate. A number of solder balls overlie the solder ball surface of the substrate. The solder balls are arranged within a ballout area. A chip is attached to the chip surface of the substrate by an adhesive layer. Contact pads of the chip are electrically connected to ones of the solder balls. The chip has an area that is smaller than the ballout area and the adhesive layer has an area that is at least as large as the ballout area such that each solder ball in the ballout area is located beneath the adhesive layer.

Abstract: A packaged electronic component includes a substrate with an upper layer, a lower layer and a middle layer between the upper layer and the lower layer. The middle layer is formed from a first material that is more flexible than the material of the upper layer and the material of the lower layer. An electronic component, such as a semiconductor chip, can be adhered over the upper layer of the substrate. Solder balls can be adhered over the lower layer of the substrate.

Abstract: The invention relates to a substrate-based chip package, comprising a substrate on which a chip is fastened by a die-attach material. The substrate is provided with a solder resist (on both sides) and, on the side that is opposite from the chip, has conductor tracks which are provided with solder balls and are connected to the chip by means of wire bridges which extend through a bonding channel which is sealed with a glob top. The chip and the substrate on the chip side being encapsulated by a molded cap.

Abstract: A leadframe of a conductive material includes a central region to accommodate a chip and a plurality of connecting fingers extending at least from one side in the direction of the central region, a contact region being provided adjacent to the central region on at least some of the connecting fingers. The course of the connecting fingers is such that a sectional face in an arbitrary imaginary cross-section at right angles to the main face of the leadframe has leadframe material. In such a case, it is attempted to keep cross-sections in a component without leadframe material as small as possible.

Abstract: A module includes a substrate and a chip attached to the substrate by a die attach material. An intermediate layer is disposed over a surface of the chip. The intermediate layer comprises a compliant material. A mold cap surrounds the surface of the chip such that the intermediate layer is disposed between the chip and the mold cap.

Abstract: The invention relates to a substrate-based chip package, comprising a substrate on which a chip is fastened by a die-attach material. The substrate is provided with a solder resist (on both sides) and, on the side that is opposite from the chip, has conductor tracks which are provided with solder balls and are connected to the chip by means of wire bridges which extend through a bonding channel which is sealed with a glob top. The chip and the substrate on the chip side being encapsulated by a molded cap.

Abstract: The invention relates to a substrate-based IC package that includes a substrate on which a chip is mounted with a die attach material. The substrate is provided with a solder resist and has, on the side opposite the chip, conductor tracks provided with soldering globules. The conductor tracks are electrically coupled to the chip via wire jumpers, which extend through a bond channel which is filled with a mold compound. The chip and the substrate are encapsulated with a mold cap on the chip side. The substrate is provided with spacers for supporting a printing template for applying the die attach material. A strip of a solder resist that surrounds at least the bond channel gaplessly with essentially the same width is provided as the spacer.