Abstract: The invention relates to a method of operating a frequency divider. The frequency divider includes a plurality of divider cells arranged in a chain. Each divider cell is adapted to divide a frequency of an input signal with one of two enabled division ratios in accordance with an applied division ratio control signal, and each divider cell but the last is adapted to provide a frequency divided signal as an input signal for a respective next divider cell. In order to enable a Fractional-N division, the method comprises receiving and buffering a new division ratio control signal for each of the divider cells, and synchronizing an application of the buffered division ratio control signals to the divider cells with a status of a current division cycle. The invention relates equally to a corresponding frequency divider, PLL frequency synthesizer, RF front end, device and system.

Abstract: The invention relates to a method of operating a frequency divider. The frequency divider includes a plurality of divider cells arranged in a chain. Each divider cell is adapted to divide a frequency of an input signal with one of two enabled division ratios in accordance with an applied division ratio control signal, and each divider cell but the last is adapted to provide a frequency divided signal as an input signal for a respective next divider cell. In order to enable a Fractional-N division, the method comprises receiving and buffering a new division ratio control signal for each of the divider cells, and synchronizing an application of the buffered division ratio control signals to the divider cells with a status of a current division cycle. The invention relates equally to a corresponding frequency divider, PLL frequency synthesizer, RF front end, device and system.