Abstract: Apparatuses and methods are disclosed for implementing an inter-processor communication channel including power-down functionality. In one embodiment, the apparatus may comprise a first integrated circuit (IC), a second IC coupled to the first IC via a communication interface, wherein the first IC is in one or more low power states and unable to monitor the communication interface. The apparatus may further comprise an inter-processor communication (IPC) channel coupled between the first and second ICs, wherein the IPC channel is separate from the communication interface and wherein the second IC generates at least one advisory signal to the first IC via the IPC channel.

Abstract: A multi-function communications device has a processor that generates a user interface audible tone signal. The device also has a downlink digital signal processor, and an uplink digital signal processor. A mixer has an input to receive the downlink signal and another input to receive the user interface tone signal. The uplink processor has an acoustic echo canceller having an input to receive the uplink signal and another input to receive an output from the mixer. The echo canceller may reduce the amount of both the far-end user's speech and the user interface tone that may be present in the uplink signal. The mixer may be positioned within the chain of audio signal processors, or it may be positioned outside the chain. Other embodiments are also described and claimed.

Abstract: Apparatuses and methods are disclosed for implementing an inter-processor communication channel including power-down functionality. In one embodiment, the apparatus may comprise a first integrated circuit (IC), a second IC coupled to the first IC via a communication interface, wherein the first IC is in one or more low power states and unable to monitor the communication interface. The apparatus may further comprise an inter-processor communication (IPC) channel coupled between the first and second ICs, wherein the IPC channel is separate from the communication interface and wherein the second IC generates at least one advisory signal to the first IC via the IPC channel.

Abstract: A multi-function communications device has a processor that generates a user interface audible tone signal. The device also has a downlink digital signal processor, and an uplink digital signal processor. A mixer has an input to receive the downlink signal and another input to receive the user interface tone signal. The uplink processor has an acoustic echo canceller having an input to receive the uplink signal and another input to receive an output from the mixer. The echo canceller may reduce the amount of both the far-end user's speech and the user interface tone that may be present in the uplink signal. The mixer may be positioned within the chain of audio signal processors, or it may be positioned outside the chain. Other embodiments are also described and claimed.

Abstract: Apparatuses and methods are disclosed for implementing an inter-processor communication channel including power-down functionality. In one embodiment, the apparatus may comprise a first integrated circuit (IC), a second IC coupled to the first IC via a communication interface, wherein the first IC is in one or more low power states and unable to monitor the communication interface. The apparatus may further comprise an inter-processor communication (IPC) channel coupled between the first and second ICs, wherein the IPC channel is separate from the communication interface and wherein the second IC generates at least one advisory signal to the first IC via the IPC channel.

Abstract: A multi-function communications device has a processor that generates a user interface audible tone signal. The device also has a downlink digital signal processor, and an uplink digital signal processor. A mixer has an input to receive the downlink signal and another input to receive the user interface tone signal. The uplink processor has an acoustic echo canceller having an input to receive the uplink signal and another input to receive an output from the mixer. The echo canceller may reduce the amount of both the far-end user's speech and the user interface tone that may be present in the uplink signal. The mixer may be positioned within the chain of audio signal processors, or it may be positioned outside the chain. Other embodiments are also described and claimed.

Abstract: Adjusting a clock source of a device clock to reduce wireless communication (e.g., radio frequency (RF)) interference within a device. The device clock may be derived from an input clock to a serial interface, e.g., coupled to a display, and may be initially driven by a first clock. Later, it may be determined that the serial interface clock is or will interfere with wireless communication. Accordingly, temporary clock signals may be provided to the device clock while the first clock is modified. Once modified, the modified clock signals may be provided to the device clock to reduce wireless communication interference.

Abstract: Apparatuses and methods are disclosed for implementing an inter-processor communication channel including power-down functionality. In one embodiment, the apparatus may comprise a first integrated circuit (IC), a second IC coupled to the first IC via a communication interface, wherein the first IC is in one or more low power states and unable to monitor the communication interface. The apparatus may further comprise an inter-processor communication (IPC) channel coupled between the first and second ICs, wherein the IPC channel is separate from the communication interface and wherein the second IC generates at least one advisory signal to the first IC via the IPC channel.

Abstract: Adjusting a clock source of a device clock to reduce wireless communication (e.g., radio frequency (RF)) interference within a device. The device clock may be derived from an input clock to a serial interface, e.g., coupled to a display, and may be initially driven by a first clock. Later, it may be determined that the serial interface clock is or will interfere with wireless communication. Accordingly, temporary clock signals may be provided to the device clock while the first clock is modified. Once modified, the modified clock signals may be provided to the device clock to reduce wireless communication interference.

Abstract: Apparatuses and methods are disclosed for implementing an inter-processor communication channel including power-down functionality. In one embodiment, the apparatus may comprise a first integrated circuit (IC), a second IC coupled to the first IC via a communication interface, wherein the first IC is in one or more low power states and unable to monitor the communication interface. The apparatus may further comprise an inter-processor communication (IPC) channel coupled between the first and second ICs, wherein the IPC channel is separate from the communication interface and wherein the second IC generates at least one advisory signal to the first IC via the IPC channel.

Abstract: A multi-function communications device has a processor that generates a user interface audible tone signal. The device also has a downlink digital signal processor, and an uplink digital signal processor. A mixer has an input to receive the downlink signal and another input to receive the user interface tone signal. The uplink processor has an acoustic echo canceller having an input to receive the uplink signal and another input to receive an output from the mixer. The echo canceller may reduce the amount of both the far-end user's speech and the user interface tone that may be present in the uplink signal. The mixer may be positioned within the chain of audio signal processors, or it may be positioned outside the chain. Other embodiments are also described and claimed.

Abstract: Apparatuses and methods are disclosed for implementing an inter-processor communication channel including power-down functionality. In one embodiment, the apparatus may comprise a first integrated circuit (IC), a second IC coupled to the first IC via a communication interface, wherein the first IC is in one or more low power states and unable to monitor the communication interface. The apparatus may further comprise an inter-processor communication (IPC) channel coupled between the first and second ICs, wherein the IPC channel is separate from the communication interface and wherein the second IC generates at least one advisory signal to the first IC via the IPC channel.

Abstract: With respect to a wireless network, an out of range warning provides an estimate of an amount of time remaining until a wireless device is out of range of the wireless network. In this way, the user is presented with an opportunity to take corrective measures, if desired.

Abstract: With respect to a wireless network, an out of range warning provides an estimate of an amount of time remaining until a wireless device is out of range of the wireless network. In this way, the user is presented with an opportunity to take corrective measures, if desired.

Abstract: With respect to a wireless network, an out of range warning provides an estimate of an amount of time remaining until a wireless device is out of range of the wireless network.