Patents by Inventor Stephan Voss

Stephan Voss has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20230395394
    Abstract: A method of forming a semiconductor device includes: forming a first semiconductor layer on a semiconductor substrate, the first semiconductor layer being of the same dopant type as the semiconductor substrate, the first semiconductor layer having a higher dopant concentration than the semiconductor substrate; increasing the porosity of the first semiconductor layer; first annealing the first semiconductor layer in an atmosphere including an inert gas; forming a second semiconductor layer on the first semiconductor layer; and separating the second semiconductor layer from the semiconductor substrate by splitting within the first semiconductor layer. Additional methods of forming a semiconductor device are described.
    Type: Application
    Filed: August 22, 2023
    Publication date: December 7, 2023
    Inventors: Hans-Joachim Schulze, Alexander Breymesser, Bernhard Goller, Matthias Kuenle, Helmut Oefner, Francisco Javier Santos Rodriguez, Stephan Voss
  • Patent number: 11742215
    Abstract: A method of forming a semiconductor device, including forming a first semiconductor layer on a semiconductor substrate, the first semiconductor layer being of the same dopant type as the semiconductor substrate, the first semiconductor layer having a higher dopant concentration than the semiconductor substrate, increasing the porosity of the first semiconductor layer, first annealing the first semiconductor layer at a temperature of at least 1050° C., forming a second semiconductor layer on the first semiconductor layer and separating the second semiconductor layer from the semiconductor substrate by splitting within the first semiconductor layer.
    Type: Grant
    Filed: July 28, 2021
    Date of Patent: August 29, 2023
    Assignee: Infineon Technologies AG
    Inventors: Hans-Joachim Schulze, Alexander Breymesser, Bernhard Goller, Matthias Kuenle, Helmut Oefner, Francisco Javier Santos Rodriguez, Stephan Voss
  • Patent number: 11721616
    Abstract: A semiconductor package includes a die pad comprising a die attach surface, a first lead extending away from the die pad, one or more semiconductor dies mounted on the die attach surface, the one or more semiconductor dies comprising first and second bond pads that each face away from the die attach surface, and a distribution element that provides a first transmission path for a first electrical signal between the first lead and the first bond pad of the one or more semiconductor dies and a second transmission path for the first electrical signal between the first lead and the second bond pad of the one or more semiconductor dies. The distribution element comprises at least one integrally formed circuit element that creates a difference in transmission characteristics between the first and second transmission paths.
    Type: Grant
    Filed: June 4, 2020
    Date of Patent: August 8, 2023
    Assignee: Infineon Technologies Austria AG
    Inventors: Stephan Voss, Edward Fuergut, Martin Gruber, Andreas Huerner, Anton Mauder
  • Patent number: 11721471
    Abstract: An electric device, for example a track transformer, connects to a high-voltage line. The electric device has a magnetizable core, at least one winding which is arranged in the vicinity of the core, and a housing which is filled with an insulating fluid and in which at least one winding is arranged. The core is arranged at least partly outside of the housing. In order to allow a stable mounting of a core formed of two halves, the core is arranged completely between two opposing pressing plates, between which tension elements for clamping the core extend.
    Type: Grant
    Filed: January 4, 2019
    Date of Patent: August 8, 2023
    Assignee: Siemens Energy Global GmbH & Co. KG
    Inventors: Stephan Voss, Joerg Froehner, Jonas Claus, Julian Kraus, Markus Baumann
  • Publication number: 20220384305
    Abstract: A device includes an interposer including an insulative layer between a lower metal layer and a first upper metal layer and a second upper metal layer, a semiconductor transistor die attached to the first upper metal layer and comprising a first lower main face and a second upper main face, with a drain or collector pad on the first main face and electrically connected to the first upper metal layer, a source or emitter electrode pad and a gate electrode pad on the second main face, a leadframe connected to the interposer and comprising a first lead connected with the first upper metal layer, a second lead connected with the source electrode pad, and a third lead connected with the second upper metal layer, and wherein an electrical connector that is connected between the gate electrode pad and the second upper metal layer is orthogonal to a first electrical connector.
    Type: Application
    Filed: May 25, 2022
    Publication date: December 1, 2022
    Inventors: Edward Fuergut, Anton Mauder, Stephan Voss, Martin Gruber
  • Patent number: 11515264
    Abstract: A method for processing a semiconductor wafer is proposed. The method may include reducing a thickness of the semiconductor wafer. A carrier structure is placed on a first side of the semiconductor wafer, e.g. before or after reducing the thickness of the semiconductor wafer. The method further includes providing a support structure on a second side of the semiconductor wafer opposite to the first side, e.g. after reducing the thickness of the semiconductor wafer. Methods for welding a support structure onto a semiconductor wafer are proposed. Further, semiconductor composite structures with support structures welded onto a semiconductor wafer are proposed.
    Type: Grant
    Filed: May 24, 2019
    Date of Patent: November 29, 2022
    Assignee: Infineon Technologies AG
    Inventors: Francisco Javier Santos Rodriguez, Alexander Breymesser, Erich Griebl, Michael Knabl, Matthias Kuenle, Andreas Moser, Roland Rupp, Hans-Joachim Schulze, Sokratis Sgouridis, Stephan Voss
  • Publication number: 20220359428
    Abstract: A method for processing a semiconductor wafer is proposed. The method may include: reducing a thickness of the semiconductor wafer; before or after reducing the thickness of the semiconductor wafer, placing a carrier structure at a first side of the semiconductor wafer; and after reducing the thickness of the semiconductor wafer, providing a support structure at a second side of the semiconductor wafer opposite to the first side. Methods for welding a support structure onto a semiconductor wafer are proposed. Further, semiconductor composite structures with support structures welded onto a semiconductor wafer are proposed.
    Type: Application
    Filed: July 20, 2022
    Publication date: November 10, 2022
    Inventors: Francisco Javier Santos Rodriguez, Alexander Breymesser, Erich Griebl, Michael Knabl, Matthias Kuenle, Andreas Moser, Roland Rupp, Hans-Joachim Schulze, Sokratis Sgouridis, Stephan Voss
  • Patent number: 11406367
    Abstract: A biopsy device is provided comprising a tubular member, a hollow shaft and an elongated fiber body. The hollow shaft may have a distal end and a shaft, wherein a laterally (sidewardly) facing notch is formed in the distal portion of the shaft. The elongated fiber body may include at least one optical fiber, preferably at least two optical fibers, with a distal end. The tubular member is movable relative to the shaft, between a first position in which the notch is covered by the tubular member, and a second position in which the notch is not covered by the tubular member. The fiber body is movable within the shaft, between a first position in which the distal end of the optical fiber is located at the distal end of the shaft with the elongated fiber body extending through the notch, and a second position in which the distal end of the at least one optical fiber is located proximally to the notch.
    Type: Grant
    Filed: June 26, 2018
    Date of Patent: August 9, 2022
    Assignee: KONINKLIJKE PHILIPS N.V.
    Inventors: Waltherus Cornelis Jozef Bierhoff, Christian Reich, Martinus Bernardus Van Der Mark, Bernardus Hendrikus Wilhelmus Hendriks, Anja Van De Stolpe, Stephan Voss, Axel Winkel, Marjolein Van Der Voort, Vishnu Vardhan Pully, Gerhardus Wilhelmus Lucassen, Susanne Dorien Van Den Berg-Dams, Jarich Willem Spliethoff
  • Publication number: 20220199464
    Abstract: A semiconductor device and a method of manufacturing a semiconductor are provided. In an embodiment, a metallic layer may be formed over a semiconductor substrate. An anti-reflective layer may be formed over the metallic layer. A passivation layer may be formed over the anti-reflective layer. An opening may be formed in the passivation layer to expose the anti-reflective layer.
    Type: Application
    Filed: December 21, 2020
    Publication date: June 23, 2022
    Inventors: Stephan VOSS, Alexander BREYMESSER, Eva-Maria HOF, Mathias PLAPPERT, Carsten SCHAEFFER
  • Publication number: 20220037165
    Abstract: A method of forming a semiconductor device, including forming a first semiconductor layer on a semiconductor substrate, the first semiconductor layer being of the same dopant type as the semiconductor substrate, the first semiconductor layer having a higher dopant concentration than the semiconductor substrate, increasing the porosity of the first semiconductor layer, first annealing the first semiconductor layer at a temperature of at least 1050° C., forming a second semiconductor layer on the first semiconductor layer and separating the second semiconductor layer from the semiconductor substrate by splitting within the first semiconductor layer.
    Type: Application
    Filed: July 28, 2021
    Publication date: February 3, 2022
    Inventors: Hans-Joachim Schulze, Alexander Breymesser, Bernhard Goller, Matthias Kuenle, Helmut Oefner, Francisco Javier Santos Rodriguez, Stephan Voss
  • Publication number: 20210384111
    Abstract: A semiconductor package includes a die pad comprising a die attach surface, a first lead extending away from the die pad, one or more semiconductor dies mounted on the die attach surface, the one or more semiconductor dies comprising first and second bond pads that each face away from the die attach surface, and a distribution element that provides a first transmission path for a first electrical signal between the first lead and the first bond pad of the one or more semiconductor dies and a second transmission path for the first electrical signal between the first lead and the second bond pad of the one or more semiconductor dies. The distribution element comprises at least one integrally formed circuit element that creates a difference in transmission characteristics between the first and second transmission paths.
    Type: Application
    Filed: June 4, 2020
    Publication date: December 9, 2021
    Inventors: Stephan Voss, Edward Fuergut, Martin Gruber, Andreas Huerner, Anton Mauder
  • Patent number: 11081544
    Abstract: A method of manufacturing a device in a semiconductor body includes forming a first field stop zone portion of a first conductivity type and a drift zone of the first conductivity type on the first field stop zone portion. An average doping concentration of the drift zone is smaller than 80% of that of the first field stop zone portion. The semiconductor body is processed at a first surface and thinned by removing material from a second surface. A second field stop zone portion of the first conductivity type is formed by implanting protons at one or more energies through the second surface. A deepest end-of-range peak of the protons is set in the first field stop zone portion at a vertical distance to a transition between the drift zone and first field stop zone portion in a range from 3 ?m to 60 ?m. The semiconductor body is annealed.
    Type: Grant
    Filed: November 28, 2018
    Date of Patent: August 3, 2021
    Assignee: Infineon Technologies AG
    Inventors: Hans-Joachim Schulze, Franz-Josef Niedernostheide, Oana Julia Spulber, Stephan Voss
  • Publication number: 20210065944
    Abstract: A core for a transformer includes a multiplicity of bent metal sheets that are all connected to form a structure which surrounds a core opening and forms the core. The sheet ends of each of the metal sheet do not touch one another within the core. The metal sheets together with the core form at least one air gap at the respective sheet ends within the core or at a periphery of the core. The core is impregnated or coated, at least at the sheet ends of the metal sheets, with a lacquer or coating that contains magnetic particles. The impregnation or coating fills at least the air gaps at the sheet ends of the metal sheets. A method for producing a transformer having a core is also provided.
    Type: Application
    Filed: March 1, 2019
    Publication date: March 4, 2021
    Inventor: STEPHAN VOSS
  • Publication number: 20210050139
    Abstract: An electric device, for example a track transformer, connects to a high-voltage line. The electric device has a magnetizable core, at least one winding which is arranged in the vicinity of the core, and a housing which is filled with an insulating fluid and in which at least one winding is arranged. The core is arranged at least partly outside of the housing. In order to allow a stable mounting of a core formed of two halves, the core is arranged completely between two opposing pressing plates, between which tension elements for clamping the core extend.
    Type: Application
    Filed: January 4, 2019
    Publication date: February 18, 2021
    Inventors: STEPHAN VOSS, JOERG FROEHNER, JONAS CLAUS, JULIAN KRAUS, MARKUS BAUMANN
  • Patent number: 10622138
    Abstract: A winding arrangement for an electric installation has an electric conductor and a plurality of cooling ducts. The electric conductor is coiled up forming several layers around an axis. Each cooling duct extends between a pair of adjacent layers of the coiled electric conductor in axial direction through the winding arrangement and in tangential direction not entirely around the axis. The cooling ducts of the plurality of cooling ducts are distributed among more than one pair of adjacent layers such that the winding arrangement is substantially cylindrical.
    Type: Grant
    Filed: October 28, 2015
    Date of Patent: April 14, 2020
    Assignee: Siemens Aktiengesellschaft
    Inventors: Eugenio De Santis, Jr., Joel Mendes, Antonio Pedro Silva, Stephan Voss
  • Publication number: 20190363057
    Abstract: A method for processing a semiconductor wafer is proposed. The method may include reducing a thickness of the semiconductor wafer. A carrier structure is placed on a first side of the semiconductor wafer, e.g. before or after reducing the thickness of the semiconductor wafer. The method further includes providing a support structure on a second side of the semiconductor wafer opposite to the first side, e.g. after reducing the thickness of the semiconductor wafer. Methods for welding a support structure onto a semiconductor wafer are proposed. Further, semiconductor composite structures with support structures welded onto a semiconductor wafer are proposed.
    Type: Application
    Filed: May 24, 2019
    Publication date: November 28, 2019
    Inventors: Francisco Javier Santos Rodriguez, Alexander Breymesser, Erich Griebl, Michael Knabl, Matthias Kuenle, Andreas Moser, Roland Rupp, Hans-Joachim Schulze, Sokratis Sgouridis, Stephan Voss
  • Patent number: 10342416
    Abstract: The present invention relates to a medical probe which consists of a cannula with a multilumen stylet inside. The multilumen contains at least two lumen. Both the multilumen as well as the cannula may have beveled ends. In the lumen straight optical fibers (i.e. no angle end face) are present that can be connected at the proximal end to a console. The cannula, multilumen, fiber system forming the medical probe comprises at least in one of the lumen of the multilumen more than one optical fiber. Preferably the source and detector fibers for the fluorescence detection are contained in one single lumen of the multilumen.
    Type: Grant
    Filed: October 9, 2012
    Date of Patent: July 9, 2019
    Assignee: KONINKLIJKE PHILIPS N.V.
    Inventors: Waltherus Cornelis Jozef Bierhoff, Axel Winkel, Bernardus Hendrikus Wilhelmus Hendriks, Stephan Voss, Gerhardus Wilhelmus Lucassen
  • Patent number: 10340264
    Abstract: Semiconductor device is provided with a semiconductor body that includes a clamping structure including a first pn junction diode and a second pn junction diode serially connected back to back between a first contact and a second contact. A breakdown voltage of the first pn junction diode is greater than 100 V, and a breakdown voltage of the second pn junction diode is greater than 10 V.
    Type: Grant
    Filed: February 28, 2018
    Date of Patent: July 2, 2019
    Assignee: Infineon Technologies Austria AG
    Inventors: Stephan Voss, Roman Baburske, Thomas Basler, Thomas Kimmer, Hans-Joachim Schulze
  • Publication number: 20190165090
    Abstract: A method of manufacturing a device in a semiconductor body includes forming a first field stop zone portion of a first conductivity type and a drift zone of the first conductivity type on the first field stop zone portion. An average doping concentration of the drift zone is smaller than 80% of that of the first field stop zone portion. The semiconductor body is processed at a first surface and thinned by removing material from a second surface. A second field stop zone portion of the first conductivity type is formed by implanting protons at one or more energies through the second surface. A deepest end-of-range peak of the protons is set in the first field stop zone portion at a vertical distance to a transition between the drift zone and first field stop zone portion in a range from 3 ?m to 60 ?m. The semiconductor body is annealed.
    Type: Application
    Filed: November 28, 2018
    Publication date: May 30, 2019
    Inventors: Hans-Joachim Schulze, Franz-Josef Niedernostheide, Oana Julia Spulber, Stephan Voss
  • Patent number: 10249746
    Abstract: A superjunction bipolar transistor includes an active transistor cell area that includes active transistor cells electrically connected to a first load electrode at a front side of a semiconductor body. A superjunction area overlaps the active transistor cell area and includes a low-resistive region and a reservoir region outside of the low-resistive region. The low-resistive region includes a first superjunction structure with a first vertical extension with respect to a first surface at the front side of the semiconductor body. The reservoir region includes no superjunction structure such that the reservoir region includes the semiconductor body that extends from a region located at the first surface to a drain region.
    Type: Grant
    Filed: December 28, 2017
    Date of Patent: April 2, 2019
    Assignee: Infineon Technologies AG
    Inventors: Frank Dieter Pfirsch, Franz-Josef Niedernostheide, Hans-Joachim Schulze, Stephan Voss