Patents by Inventor Stephania Perri

Stephania Perri has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Adders and adder bit blocks having an internal propagation characteristic independent of a carry input to the bit block and methods for using the same
    Patent number: 7016932
    Abstract: Bit blocks for an adder are provided which include a first bit stage that generates a first bit associated propagation characteristic (bapc). The bapc is independent of a carry input to the bit block from another bit block of the adder. Additional bit stages may be included in the bit block such as a second bit stage that, based on the first bapc, generates a second bapc that is also independent of the carry input to the bit block. The first and second bapc may be generated based on first and second operand bits input to the respective stages and a bapc that is generated by a less significant bit stage of the bit block and is independent of the carry input to the bit block. Adders including the bit blocks and methods for adding using the bit block as well as bit block size optimization methods are also provided.
    Type: Grant
    Filed: October 23, 2001
    Date of Patent: March 21, 2006
    Assignees: Idaho State University, Departmente of Informatics and Transportation (DIMET), University of Reggio Calabria Loc.
    Inventors: Vitit Kantabutra, Pasquale Corsonello, Stephania Perri
  • Adders and adder bit blocks having an internal propagation characteristic independent of a carry input to the bit block and methods for using the same
    Publication number: 20020091744
    Abstract: Bit blocks for an adder are provided which include a first bit stage that generates a first bit associated propagation characteristic (bapc). The bapc is independent of a carry input to the bit block from another bit block of the adder. Additional bit stages may be included in the bit block such as a second bit stage that, based on the first bapc, generates a second bapc that is also independent of the carry input to the bit block. The first and second bapc may be generated based on first and second operand bits input to the respective stages and a bapc that is generated by a less significant bit stage of the bit block and is independent of the carry input to the bit block. Adders including the bit blocks and methods for adding using the bit block as well as bit block size optimization methods are also provided.
    Type: Application
    Filed: October 23, 2001
    Publication date: July 11, 2002
    Inventors: Vitit Kantabutra, Pasquale Corsonello, Stephania Perri