Patents by Inventor Stephanie BOJARSKI

Stephanie BOJARSKI has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20250159927
    Abstract: Integrated circuit structures having partitioned source or drain contact structures, and methods of fabricating integrated circuit structures having partitioned source or drain contact structures, are described. For example, an integrated circuit structure includes a fin. A gate stack is over the fin. A first epitaxial source or drain structure is at a first end of the fin. A second epitaxial source or drain structure is at a second end of the fin. A conductive contact structure is coupled to one of the first or the second epitaxial source or drain structures. The conductive contact structure has a first portion partitioned from a second portion.
    Type: Application
    Filed: January 15, 2025
    Publication date: May 15, 2025
    Inventors: Mauro J. KOBRINSKY, Stephanie BOJARSKI, Babita DHAYAL, Biswajeet GUHA, Tahir GHANI
  • Patent number: 12230717
    Abstract: Integrated circuit structures having partitioned source or drain contact structures, and methods of fabricating integrated circuit structures having partitioned source or drain contact structures, are described. For example, an integrated circuit structure includes a fin. A gate stack is over the fin. A first epitaxial source or drain structure is at a first end of the fin. A second epitaxial source or drain structure is at a second end of the fin. A conductive contact structure is coupled to one of the first or the second epitaxial source or drain structures. The conductive contact structure has a first portion partitioned from a second portion.
    Type: Grant
    Filed: February 23, 2023
    Date of Patent: February 18, 2025
    Assignee: Intel Corporation
    Inventors: Mauro J. Kobrinsky, Stephanie Bojarski, Babita Dhayal, Biswajeet Guha, Tahir Ghani
  • Publication number: 20230207700
    Abstract: Integrated circuit structures having partitioned source or drain contact structures, and methods of fabricating integrated circuit structures having partitioned source or drain contact structures, are described. For example, an integrated circuit structure includes a fin. A gate stack is over the fin. A first epitaxial source or drain structure is at a first end of the fin. A second epitaxial source or drain structure is at a second end of the fin. A conductive contact structure is coupled to one of the first or the second epitaxial source or drain structures. The conductive contact structure has a first portion partitioned from a second portion.
    Type: Application
    Filed: February 23, 2023
    Publication date: June 29, 2023
    Inventors: Mauro J. KOBRINSKY, Stephanie BOJARSKI, Babita DHAYAL, Biswajeet GUHA, Tahir GHANI
  • Patent number: 11621354
    Abstract: Integrated circuit structures having partitioned source or drain contact structures, and methods of fabricating integrated circuit structures having partitioned source or drain contact structures, are described. For example, an integrated circuit structure includes a fin. A gate stack is over the fin. A first epitaxial source or drain structure is at a first end of the fin. A second epitaxial source or drain structure is at a second end of the fin. A conductive contact structure is coupled to one of the first or the second epitaxial source or drain structures. The conductive contact structure has a first portion partitioned from a second portion.
    Type: Grant
    Filed: September 5, 2018
    Date of Patent: April 4, 2023
    Assignee: Intel Corporation
    Inventors: Mauro J. Kobrinsky, Stephanie Bojarski, Babita Dhayal, Biswajeet Guha, Tahir Ghani
  • Patent number: 11329162
    Abstract: Integrated circuit structures having differentiated neighboring partitioned source or drain contact structures are described. An integrated circuit structure includes a first gate stack over a first fin, and a second gate stack over a second fin. First and second epitaxial source or drain structures are at first and second ends of the first fin. Third and fourth epitaxial source or drain structures are at first and second ends of the second fin. A first conductive contact structure is coupled to one of the first or the second epitaxial source or drain structures, and has a first portion partitioned from a second portion. A second conductive contact structure is coupled to one of the third or the fourth epitaxial source or drain structures, and has a first portion partitioned from a second portion. The second conductive contact structure is neighboring the first conductive contact structure and has a composition different than a composition of the first conductive contact structure.
    Type: Grant
    Filed: September 5, 2018
    Date of Patent: May 10, 2022
    Assignee: Intel Corporation
    Inventors: Mauro J. Kobrinsky, Stephanie Bojarski, Myra McDonnell, Tahir Ghani
  • Publication number: 20200075771
    Abstract: Integrated circuit structures having partitioned source or drain contact structures, and methods of fabricating integrated circuit structures having partitioned source or drain contact structures, are described. For example, an integrated circuit structure includes a fin. A gate stack is over the fin. A first epitaxial source or drain structure is at a first end of the fin. A second epitaxial source or drain structure is at a second end of the fin. A conductive contact structure is coupled to one of the first or the second epitaxial source or drain structures. The conductive contact structure has a first portion partitioned from a second portion.
    Type: Application
    Filed: September 5, 2018
    Publication date: March 5, 2020
    Inventors: Mauro J. KOBRINSKY, Stephanie BOJARSKI, Babita DHAYAL, Biswajeet GUHA, Tahir GHANI
  • Publication number: 20200075770
    Abstract: Integrated circuit structures having differentiated neighboring partitioned source or drain contact structures are described. An integrated circuit structure includes a first gate stack over a first fin, and a second gate stack over a second fin. First and second epitaxial source or drain structures are at first and second ends of the first fin. Third and fourth epitaxial source or drain structures are at first and second ends of the second fin. A first conductive contact structure is coupled to one of the first or the second epitaxial source or drain structures, and has a first portion partitioned from a second portion. A second conductive contact structure is coupled to one of the third or the fourth epitaxial source or drain structures, and has a first portion partitioned from a second portion. The second conductive contact structure is neighboring the first conductive contact structure and has a composition different than a composition of the first conductive contact structure.
    Type: Application
    Filed: September 5, 2018
    Publication date: March 5, 2020
    Inventors: Mauro J. KOBRINSKY, Stephanie BOJARSKI, Myra MCDONNELL, Tahir GHANI