Patents by Inventor Stephanus D. Saputro

Stephanus D. Saputro has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6788073
    Abstract: A data processing system having mismatched impedance components and method of use is disclosed. In one embodiment, the method includes exciting a printed circuit board circuit having mismatched impedance printed circuit board components. Measuring at least one impedance of the circuit with a time domain reflectometer. In response to the measured at least one impedance of the circuit, adjusting at least one printed circuit board circuit element.
    Type: Grant
    Filed: September 6, 2002
    Date of Patent: September 7, 2004
    Assignee: Dell Products L.P.
    Inventors: Douglas E. Wallace, Steven J. Lash, Stephanus D. Saputro
  • Patent number: 6762368
    Abstract: The inductance of the capacitor is reduced by connecting the capacitor directly to a via. In one embodiment inductance of a capacitor is reduced by a plurality of via, the number of via greater than the number of electrical couplings from the voltage pad to the voltage plane. In one embodiment the capacitor has a ground pad of a minimum size. In another embodiment the capacitor is electrically coupled to a trace having a length reduced to minimize inductance.
    Type: Grant
    Filed: July 13, 2001
    Date of Patent: July 13, 2004
    Assignee: Dell Products L.P.
    Inventors: Stephanus D. Saputro, Lan Zhang
  • Publication number: 20030038639
    Abstract: A data processing system having mismatched impedance components and method of use is disclosed. In one embodiment, the method includes exciting a printed circuit board circuit having mismatched impedance printed circuit board components. Measuring at least one impedance of the circuit with a time domain reflectometer. In response to the measured at least one impedance of the circuit, adjusting at least one printed circuit board circuit element.
    Type: Application
    Filed: September 6, 2002
    Publication date: February 27, 2003
    Applicant: DELL PRODUCTS L.P.
    Inventors: Douglas E. Wallace, Steven J. Lash, Stephanus D. Saputro
  • Publication number: 20030035277
    Abstract: The inductance of the capacitor is reduced by connecting the capacitor directly to a via. In one embodiment inductance of a capacitor is reduced by a plurality of via, the number of via greater than the number of electrical couplings from the voltage pad to the voltage plane. In one embodiment the capacitor has a ground pad of a minimum size. In another embodiment the capacitor is electrically coupled to a trace having a length reduced to minimize inductance.
    Type: Application
    Filed: July 13, 2001
    Publication date: February 20, 2003
    Inventors: Stephanus D. Saputro, Lan Zhang