Patents by Inventor Stephen A. Evans

Stephen A. Evans has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Method for fabricating a poly emitter logic array and apparatus produced thereby
    Patent number: 5244832
    Abstract: A Schottky diode includes a metal layer (62) on an epitaxial region (24). The metal layer (62) is covered with a dielectric layer (64). An area (90) on the metal is exposed by opening a via (68) in the dielectric. The exposed area (90) is spaced from a buried perimeter (92) of the metal layer (62). A conductive lead (86) is formed in the Schottky via (68). A poly emitter terminal (46) connects a small sized emitter (50) formed in an epitaxial region (24) to the exterior. Poly emitter (46) presents a large area (76) to the exterior for alignment with a via (66) through a passivating dielectric layer (64), thus alleviating alignment problems.
    Type: Grant
    Filed: May 5, 1989
    Date of Patent: September 14, 1993
    Assignee: Texas Instruments Incorporated
    Inventors: Francis J. Morris, Stephen A. Evans
  • Method for fabricating a buried Schottky logic array and apparatus produced thereby
    Patent number: 5140383
    Abstract: A Schottky diode includes a metal layer (62) on an epitaxial region (24). The metal layer (62) is covered with a dielectric layer (64). An area (90) on the metal is exposed by opening a via (68) in the dielectric. The exposed area (90) is spaced from a buried perimeter (92) of the metal layer (62). A conductive lead (86) is formed in the Schottky via (68). A poly emitter terminal (46) connects a small sized emitter (50) formed in an epitaxial region (24) to the exterior. Poly emitter (46) presents a large area (76) to the exterior for alignment with a via (66) through a passivating dielectric layer (64), thus alleviating alignment problems.
    Type: Grant
    Filed: February 22, 1991
    Date of Patent: August 18, 1992
    Assignee: Texas Instruments Incorporated
    Inventors: Francis J. Morris, Stephen A. Evans
  • Method for fabricating a poly emitter logic array
    Patent number: 4898838
    Abstract: A Schottky diode includes a metal layer (62) on an epitaxial region (24). The metal layer (62) is covered with a dielectric layer (64). An area (90) on the metal is exposed by opening a via (68) in the dielectric. The exposed area (90) is spaced from a buried perimeter (92) of the metal layer (62). A conductive lead (86) is formed in the Schottky via (68). A poly emitter terminal (46) connects a small sized emitter (50) formed in an epitaxial region (24) to the exterior. Poly emitter (46) presents a large area (76) to the exterior for alignment with a via (66) through a passivating dielectric layer (64), thus alleviating alignment problems.
    Type: Grant
    Filed: October 16, 1985
    Date of Patent: February 6, 1990
    Assignee: Texas Instruments Incorporated
    Inventors: Francis J. Morris, Stephen A. Evans