Patents by Inventor Stephen A. Meisner

Stephen A. Meisner has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8324742
    Abstract: An IC alignment mark in a contact metal layer for use under an opaque layer, and a process for forming the alignment mark, are disclosed. The alignment mark includes contact metal fields, each several microns wide, with an array of PMD pillars in the interior, formed during contact etch, contact metal deposition and selective contact metal removal processes. The pillars are arrayed such that all exposed surfaces of the contact metal are planar. One configuration is a rectangular array in which every other row is laterally offset by one-half of the column spacing. Horizontal dimensions of the pillars are selected to maximize the contact metal fill factor, while providing sufficient adhesion to the underlying substrate during processing. The contact metal is at least 15 nanometers lower than the PMD layer surrounding the alignment mark, as a result of the contact metal removal process.
    Type: Grant
    Filed: August 1, 2008
    Date of Patent: December 4, 2012
    Assignee: Texas Instruments Incorporated
    Inventors: Scott R. Summerfelt, Stephen A. Meisner, John B. Robbins
  • Patent number: 8268696
    Abstract: An IC alignment mark in a contact metal layer for use under an opaque layer, and a process for forming the alignment mark, are disclosed. The alignment mark includes contact metal fields, each several microns wide, with an array of PMD pillars in the interior, formed during contact etch, contact metal deposition and selective contact metal removal processes. The pillars are arrayed such that all exposed surfaces of the contact metal are planar. One configuration is a rectangular array in which every other row is laterally offset by one-half of the column spacing. Horizontal dimensions of the pillars are selected to maximize the contact metal fill factor, while providing sufficient adhesion to the underlying substrate during processing. The contact metal is at least 15 nanometers lower than the PMD layer surrounding the alignment mark, as a result of the contact metal removal process.
    Type: Grant
    Filed: December 9, 2010
    Date of Patent: September 18, 2012
    Assignee: Texas Instruments Incorporated
    Inventors: Scott R. Summerfelt, Stephen A. Meisner, John B. Robbins
  • Publication number: 20110306176
    Abstract: An IC alignment mark in a contact metal layer for use under an opaque layer, and a process for forming the alignment mark, are disclosed. The alignment mark includes contact metal fields, each several microns wide, with an array of PMD pillars in the interior, formed during contact etch, contact metal deposition and selective contact metal removal processes. The pillars are arrayed such that all exposed surfaces of the contact metal are planar. One configuration is a rectangular array in which every other row is laterally offset by one-half of the column spacing. Horizontal dimensions of the pillars are selected to maximize the contact metal fill factor, while providing sufficient adhesion to the underlying substrate during processing. The contact metal is at least 15 nanometers lower than the PMD layer surrounding the alignment mark, as a result of the contact metal removal process.
    Type: Application
    Filed: December 9, 2010
    Publication date: December 15, 2011
    Applicant: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Scott R. Summerfelt, Stephen A. Meisner, John B. Robbins
  • Publication number: 20090243122
    Abstract: An IC alignment mark in a contact metal layer for use under an opaque layer, and a process for forming the alignment mark, are disclosed. The alignment mark includes contact metal fields, each several microns wide, with an array of PMD pillars in the interior, formed during contact etch, contact metal deposition and selective contact metal removal processes. The pillars are arrayed such that all exposed surfaces of the contact metal are planar. One configuration is a rectangular array in which every other row is laterally offset by one-half of the column spacing. Horizontal dimensions of the pillars are selected to maximize the contact metal fill factor, while providing sufficient adhesion to the underlying substrate during processing. The contact metal is at least 15 nanometers lower than the PMD layer surrounding the alignment mark, as a result of the contact metal removal process.
    Type: Application
    Filed: August 1, 2008
    Publication date: October 1, 2009
    Applicant: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Scott R. Summerfelt, Stephen A. Meisner, John B. Robbins
  • Patent number: 6225134
    Abstract: A method for controlling linewidth in photolithography and in particular during the fabrication of integrated circuits involves separately introducing a linewidth control feature onto a substrate or wafer. This linewidth control feature is preferably introduced after the desired design features or codes and is introduced using the same photomask or reticle as the desired design features. This photomask preferably includes the linewidth control feature at a point outside the maximum field zone as well as a masked pad portion that is in the maximum field zone. This masked pad portion is introduced with the desired design features and serves as a location for subsequent exposure of the linewidth control features. The method allows for the variation in linewidth introduced by the lens to be minimized, or even eliminated, since the same portion of the lens field can be used to expose each linewidth control feature.
    Type: Grant
    Filed: October 30, 1998
    Date of Patent: May 1, 2001
    Assignee: Lucent Technologies, Inc.
    Inventor: Stephen A. Meisner