Patents by Inventor Stephen Alan KELLER

Stephen Alan KELLER has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Method for stripping one or more layers from a semiconductor wafer
    Patent number: 11205575
    Abstract: A method of forming an integrated circuit includes forming a first layer having a first material type over a first side of a semiconductor wafer. A second layer having a second different material type is removed from a second opposing side of the semiconductor wafer using a first process that removes the second material type at a greater rate than the first material type. Subsequent to removing the second layer, the first layer is removed using a second different process.
    Type: Grant
    Filed: August 27, 2019
    Date of Patent: December 21, 2021
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Byron Joseph Palla, Stephen Alan Keller, Brian Edward Hornung, Brian K. Kirkpatrick, Douglas Ticknor Grider
  • METHOD FOR STRIPPING ONE OR MORE LAYERS FROM A SEMICONDUCTOR WAFER
    Publication number: 20200343099
    Abstract: A method of forming an integrated circuit includes forming a first layer having a first material type over a first side of a semiconductor wafer. A second layer having a second different material type is removed from a second opposing side of the semiconductor wafer using a first process that removes the second material type at a greater rate than the first material type. Subsequent to removing the second layer, the first layer is removed using a second different process.
    Type: Application
    Filed: August 27, 2019
    Publication date: October 29, 2020
    Inventors: Byron Joseph Palla, Stephen Alan Keller, Brian Edward Hornung, Brian K. Kirpatrick, Douglas Ticknor Grider
  • Single pattern high precision capacitor
    Patent number: 9269663
    Abstract: An integrated circuit contains a high precision capacitor having a bottom plate, a dielectric layer over the bottom plate, a capacitor opening in the dielectric layer exposing, and not overlapping, the bottom plate, a capacitor dielectric layer covering sidewalls and a bottom of the capacitor opening, a top plate covering the capacitor dielectric layer in the capacitor opening, and a capacitor planarizing dielectric layer covering the capacitor top plate in the capacitor opening. A top surface of the capacitor planarizing dielectric layer and a top edge of the capacitor top plate are substantially coplanar. The top plate does not extend laterally beyond the capacitor opening. A method of forming the integrated circuit the high precision capacitor is also disclosed.
    Type: Grant
    Filed: November 12, 2013
    Date of Patent: February 23, 2016
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Stephen Alan Keller, Michael LeRoy Huber
  • SINGLE PATTERN HIGH PRECISION CAPACITOR
    Publication number: 20140159201
    Abstract: An integrated circuit contains a high precision capacitor having a bottom plate, a dielectric layer over the bottom plate, a capacitor opening in the dielectric layer exposing, and not overlapping, the bottom plate, a capacitor dielectric layer covering sidewalls and a bottom of the capacitor opening, a top plate covering the capacitor dielectric layer in the capacitor opening, and a capacitor planarizing dielectric layer covering the capacitor top plate in the capacitor opening. A top surface of the capacitor planarizing dielectric layer and a top edge of the capacitor top plate are substantially coplanar. The top plate does not extend laterally beyond the capacitor opening. A method of forming the integrated circuit the high precision capacitor is also disclosed.
    Type: Application
    Filed: November 12, 2013
    Publication date: June 12, 2014
    Applicant: Texas Instruments Incorporated
    Inventors: Stephen Alan KELLER, Michael LeRoy HUBER