Abstract: The present invention generally relates to a method for improving inversion layer mobility and providing low defect density in a semiconductor device based upon a silicon carbide (SiC) substrate. More specifically, the present invention provides a method for the manufacture of a semiconductor device based upon a silicon carbide substrate and comprising an oxide layer comprising incorporating at least one additive into the atomic structure of the oxide layer. Semiconductor devices, such as MOSFETS, based upon a substrate treated according to the present method are expected to have inversion layer mobilities of at least about 60 cm2/Vs.

Abstract: A crystalline composition is provided that includes gallium and nitrogen. The crystalline composition may have an amount of oxygen present in a concentration of less than about 3×1018 per cubic centimeter, and may be free of two-dimensional planar boundary defects in a determined volume of the crystalline composition. The volume may have at least one dimension that is about 2.75 millimeters or greater, and the volume may have a one-dimensional linear defect dislocation density of less than about 10,000 per square centimeter.

Abstract: A crystalline composition is provided. The crystalline composition may include gallium and nitrogen; and the crystalline composition may have an infrared absorption peak at about 3175 cm?1, with an absorbance per unit thickness of greater than about 0.01 cm?1.

Abstract: A power semiconductor module includes: an interconnect layer including an electrical conductor patterned on a dielectric layer, the electrical conductor including a power coupling portion having a thickness sufficient to carry power currents and a control coupling portion having a thickness thinner than that of the power coupling portion; and a semiconductor power device physically coupled to the interconnect layer and electrically coupled to the power coupling portion of the electrical conductor.

Abstract: A semiconductor material having an epitaxial layer formed thereon and methods of forming an epitaxial layer on a semiconductor material are provided. The method includes disposing a masking layer and patterning the masking layer to form openings and growing an epitaxial layer through the openings and over the masking layer where the epitaxial layer is coalescent.

Abstract: A crystal comprising gallium nitride is disclosed. The crystal has at least one grain having at least one dimension greater than 2.75 mm, a dislocation density less than about 104 cm?2, and is substantially free of tilt boundaries.

Abstract: A system is presented. The system includes a first micro-electromechanical system switch. Further, the system includes arc suppression circuitry coupled to the first micro-electromechanical system switch, wherein the arc suppression circuitry comprises a balanced diode bridge and is configured to facilitate suppression of an arc formation between contacts of the first micro-electromechanical system switch.

Abstract: A micro-electromechanical system (MEMS) switch array for power switching includes an input node, an output node, and a plurality of MEMS switches, wherein the input node and the output node are independently in electrical communication with a portion of the plurality of MEMS switches, and wherein a failure of any one of the plurality of MEMS switches does not render ineffective another MEMS switch within the MEMS switch array.

Abstract: A light emitting diode (10) has a backside and a front-side with at least one n-type electrode (14) and at least one p-type electrode (12) disposed thereon defining a minimum electrodes separation (delectrodes). A bonding pad layer (50) includes at least one n-type bonding pad (64) and at least one p-type bonding pad (62) defining a minimum bonding pads separation (dpads) that is larger than the minimum electrodes separation (delectrodes). At least one fanning layer (30) interposed between the front-side of the light emitting diode (10) and the bonding pad layer (50) includes a plurality of electrically conductive paths passing through vias (34, 54) of a dielectric layer (32, 52) to provide electrical communication between the at least one n-type electrode (14) and the at least one n-type bonding pad (64) and between the at least one p-type electrode (12) and the at least one p-type bonding pad (62).

Abstract: A semiconductor device includes a substrate comprising a material selected from the group consisting of AlN, SiC, GaN, sapphire and combinations thereof. An n+ type epitaxial layer is disposed above substrate and comprises GaN or AlGaN. An n? type epitaxial layer is disposed above substrate and comprises GaN or AlGaN. A p+-n junction grid comprising p+ GaN or p+ AlGaN is formed on selective areas of the n? type epitaxial layer. A metal layer is disposed over the p+-n junction grid and forms a Schottky contact. Another metal layer is deposited on one of the substrate and the n+ type epitaxial layer and forms a cathode electrode. A method of fabricating a semiconductor device is provided and includes forming a p+-n junction grid on a drift layer comprising GaN or AlGaN.

Abstract: A crystalline composition is provided that includes gallium and nitrogen. The crystalline composition may have an amount of oxygen present in a concentration of less than about 3×1018 per cubic centimeter, and may be free of two-dimensional planar boundary defects in a determined volume of the crystalline composition. The volume may have at least one dimension that is about 2.75 millimeters or greater, and the volume may have a one-dimensional linear defect dislocation density of less than about 10,000 per square centimeter.

Abstract: A light emitting diode (10) has a backside and a front-side with at least one n-type electrode (14) and at least one p-type electrode (12) disposed thereon defining a minimum electrodes separation (delectrodes). A bonding pad layer (50) includes at least one n-type bonding pad (64) and at least one p-type bonding pad (62) defining a minimum bonding pads separation (dpads) that is larger than the minimum electrodes separation (delectrodes). At least one fanning layer (30) interposed between the front-side of the light emitting diode (10) and the bonding pad layer (50) includes a plurality of electrically conductive paths passing through vias (34, 54) of a dielectric layer (32, 52) to provide electrical communication between the at least one n-type electrode (14) and the at least one n-type bonding pad (64) and between the at least one p-type electrode (12) and the at least one p-type bonding pad (62).

Abstract: A pressure sensor is provided. The pressure sensor includes a multi-layer laminate comprising a substrate and a semiconductor layer, wherein the substrate comprises single crystal or quasi-single crystal aluminum oxide, and a portion of the substrate that is spaced from a peripheral edge is wet etched to form an inwardly facing sidewall that defines a volume; and a substrate to which the multi-layer laminate is secured. The volume is an enclosed volume further defined by a substrate surface.

Abstract: An etchant including a halogenated salt, such as Cryolite (Na3AlF6) or potassium tetrafluoro borate (KBF4), is provided. The salt may be present in the etchant in an amount sufficient to etch a substrate and may have a melt temperature of greater than about 200 degrees Celsius. A method of wet etching may include contacting an etchant to at least one surface of a support layer of a multi-layer laminate, wherein the support layer may include aluminum oxide; or contacting an etchant to at least one surface of a support layer of a multi-layer laminate, wherein the etchant may include Cryolite (Na3AlF6), potassium tetrafluoro borate (KBF4), or both; and etching at least a portion of the support layer. The method may provide a laminate produced by growing a crystal onto an aluminum oxide support layer, and chemically removing at least a portion of the support layer by wet etch. An electronic device, optical device or combined device including the laminate is provided.

Abstract: A crystalline composition is provided. The crystalline composition may include gallium and nitrogen; and the crystalline composition may have an infrared absorption peak at about 3175 cm?1, with an absorbance per unit thickness of greater than about 0.01 cm?1.

Abstract: A method for removing defects at high pressure and high temperature (HP/HT) or for relieving strain in a non-diamond crystal commences by providing a crystal, which contains defects, and a pressure medium. The crystal and the pressure medium are disposed in a high pressure cell and placed in a high pressure apparatus, for processing under reaction conditions of sufficiently high pressure and high temperature for a time adequate for one or more of removing defects or relieving strain in the single crystal.

Abstract: The present invention is directed towards a source of ultraviolet energy, wherein the source is a UV-emitting LED's. In an embodiment of the invention, the UV-LED's are characterized by a base layer material including a substrate, a p-doped semiconductor material, a multiple quantum well, a n-doped semiconductor material, upon which base material a p-type metal resides and wherein the base structure has a mesa configuration, which mesa configuration may be rounded on a boundary surface, or which may be non-rounded, such as a mesa having an upper boundary surface that is flat. In other words, the p-type metal resides upon a mesa formed out of the base structure materials. In a more specific embodiment, the UV-LED structure includes n-type metallization layer, passivation layers, and bond pads positioned at appropriate locations of the device. In a more specific embodiment, the p-type metal layer is encapsulated in the encapsulating layer.

Abstract: A light emitting diode (10) has a backside and a front-side with at least one n-type electrode (14) and at least one p-type electrode (12) disposed thereon defining a minimum electrodes separation (delectrodes). A bonding pad layer (50) includes at least one n-type bonding pad (64) and at least one p-type bonding pad (62) defining a minimum bonding pads separation (dpads) that is larger than the minimum electrodes separation (delectrodes). At least one fanning layer (30) interposed between the front-side of the light emitting diode (10) and the bonding pad layer (50) includes a plurality of electrically conductive paths passing through vias (34, 54) of a dielectric layer (32, 52) to provide electrical communication between the at least one n-type electrode (14) and the at least one n-type bonding pad (64) and between the at least one p-type electrode (12) and the at least one p-type bonding pad (62).

Abstract: An aspect of the present invention is directed to an avalanche photodiode (APD) device for use in oil well drilling applications in harsh, down-hole environments where shock levels are near 250 gravitational acceleration (G) and/or temperatures approach or exceed 150° C. Another aspect of the present invention is directed to an APD device fabricated using SiC materials. Another aspect of the present invention is directed to an APD device fabricated using GaN materials.

Abstract: A GaN crystal having up to about 5 mole percent of at least one of aluminum, indium, and combinations thereof. The GaN crystal has at least one grain having a diameter greater than 2 mm, a dislocation density less than about 104 cm?2, and is substantially free of tilt boundaries.