Abstract: A method may include coupling a device to a host through a connector, receiving, by a host controller, a request for boost power from the device, determining, by the host controller, an amount of surplus power available from one or more power sources arranged to provide power to the device through the connector, and allocating at least a portion of the surplus power to the device as boost power. The method may further include negotiating an amount of the boost power based on the amount of surplus power available from the one or more power sources. The method may further include monitoring a power consumption of the device, and reducing a total power allocation to the device based on the power consumption of the device.

Abstract: A high voltage circuit driver includes high and low side driver cells to drive a high and a low side power MOSFET, a bootstrap circuit to energize the high side driver cell, a high voltage PMOS transistor (HVPMOS) between a voltage source and the bootstrap circuit, wherein the HVPMOS is embedded in an N-isolation layer and is integrated with the driver cells. A bootstrap control circuit, for controlling the HVPMOS, includes a high voltage level shift stage, which can also be embedded in an N-isolation layer. The circuit driver is operated by switching the high side drive signal from high to low, the low side drive signal from low to high with a first delay, and a bootstrap control signal from high to low with an additional second delay. Also, the bootstrap capacitor is first charged by switching on the HVPMOS, and then it energizes the high side driver cell.

Abstract: A high voltage circuit driver includes high and low side driver cells to drive a high and a low side power MOSFET, a bootstrap circuit to energize the high side driver cell, a high voltage PMOS transistor (HVPMOS) between a voltage source and the bootstrap circuit, wherein the HVPMOS is embedded in an N-isolation layer and is integrated with the driver cells. A bootstrap control circuit, for controlling the HVPMOS, includes a high voltage level shift stage, which can also be embedded in an N-isolation layer. The circuit driver is operated by switching the high side drive signal from high to low, the low side drive signal from low to high with a first delay, and a bootstrap control signal from high to low with an additional second delay. Also, the bootstrap capacitor is first charged by switching on the HVPMOS, and then it energizes the high side driver cell.