Patents by Inventor Stephen C. Cripps

Stephen C. Cripps has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8461938
    Abstract: Embodiments include directional couplers, electronic devices within which they are incorporated, and methods for using directional couplers. An embodiment of a directional coupler includes a set of coupled lines and a reflection coefficient manipulator. The set of coupled lines includes first and second conductive structures. The first conductive structure has a first port, a second port, and a substantially linear, first conductive central portion between the first port and the second port. The second conductive structure has a third port, a fourth port, and a substantially linear, second conductive central portion between the third port and the fourth port. The reflection coefficient manipulator is integrated with the set of coupled lines and is disposed in proximity to a gap between the first and second conductive structures. The reflection coefficient manipulator, which includes slots, protrusions, or both, is configured to equate reflection coefficients of the first and second conductive structures.
    Type: Grant
    Filed: October 29, 2010
    Date of Patent: June 11, 2013
    Assignee: Freescale Semiconductor, Inc.
    Inventors: Basim Noori, Stephen C. Cripps
  • Publication number: 20120105170
    Abstract: Embodiments include directional couplers, electronic devices within which they are incorporated, and methods for using directional couplers. An embodiment of a directional coupler includes a set of coupled lines and a reflection coefficient manipulator. The set of coupled lines includes first and second conductive structures. The first conductive structure has a first port, a second port, and a substantially linear, first conductive central portion between the first port and the second port. The second conductive structure has a third port, a fourth port, and a substantially linear, second conductive central portion between the third port and the fourth port. The reflection coefficient manipulator is integrated with the set of coupled lines and is disposed in proximity to a gap between the first and second conductive structures. The reflection coefficient manipulator, which includes slots, protrusions, or both, is configured to equate reflection coefficients of the first and second conductive structures.
    Type: Application
    Filed: October 29, 2010
    Publication date: May 3, 2012
    Applicant: FREESCALE SEMICONDUCTOR, INC.
    Inventors: Basim H. Noori, Stephen C. Cripps
  • Patent number: 5329249
    Abstract: A control network operates a GaAs FET with a quiescent current closer to the maximum output current, I.sub.max, than to zero current. An output network couples the FET to the load and is characterized as having a low impedance at a fundamental frequency and a high impedance lower than an open circuit impedance at at least the second harmonic frequency. As a result, the peak voltage on the output terminal is greater than two times the supply voltage. A preamplifier raises the level of the input signal so that it has a positive voltage peak when biased by the control network and applied to the input terminal. This overdrives the FET and produces an output current that is at the maximum output current level for a longer time during each cycle than the output current is at a minimum level. This enhances the effect of the output network to produce an output voltage spike on the FET that is several times the DC voltage.
    Type: Grant
    Filed: October 13, 1993
    Date of Patent: July 12, 1994
    Assignee: Pacific Monolithics, Inc.
    Inventor: Stephen C. Cripps
  • Patent number: 5204613
    Abstract: A radio frequency ("RF") power sensor providing RF signal power sensing with reduced dependency upon its input signal power level includes multiple series-connected diodes for detecting the power of an input RF signal and providing an output voltage representing that power. The multiple series-connected diodes couple the input node shunted by an input load resistor to the output node shunted by an output filter capacitor. Using multiple series-connected diodes results in reduced reverse bias voltages across the diodes (presented by the charged output filter capacitor), thereby increasing their junction capacitances. These increased junction capacitances, in turn, result in reduced fractional changes thereof (e.g. capacitance "modulation") over changes in the input RF signal power. This reduction in fractional capacitance changes as a function of input signal power variations, further in turn, results in reduced input signal power dependency of the sensors' impedances and sensitivities.
    Type: Grant
    Filed: May 2, 1991
    Date of Patent: April 20, 1993
    Assignee: Wavetek Microwave, Inc.
    Inventors: Stephen C. Cripps, Thomas R. Allen
  • Patent number: 5027064
    Abstract: The operating temperature of the active region of an RF semiconductor device such as a microwave hybrid circuit having a gallium arsenide field-effect transistor therein is determined by measuring signal gain of the device at variable times following application of bias voltage to the device. Bias voltage is applied in response to a constant duty cycle pulse train from which are derived a sample-and-hold command pulse and a synchronized bias control pulse.
    Type: Grant
    Filed: April 19, 1989
    Date of Patent: June 25, 1991
    Assignee: Celeritek, Inc.
    Inventor: Stephen C. Cripps
  • Patent number: 4749959
    Abstract: A field effect transistor microwave circuit device includes first and second field effect transistors having common source connections with a pair of coupled transmission lines connecting the drain of a first transistor to the source of the second transistor and the source of the first transistor to the gate of the second transistor. The cross coupled transmission lines function as a balun between the transistors. The device is formed in III-V semiconductor and has an increased operating range in microwave frequencies. In alternative embodiments, the balun is connected to the circuit output thereby permitting the cascading of a plurality of FET devices. The balun can be integrated into the device structure or connected as a discrete element in a hybrid circuit arrangement.
    Type: Grant
    Filed: November 24, 1986
    Date of Patent: June 7, 1988
    Assignee: Celeritek, Inc.
    Inventors: Stephen C. Cripps, John R. Anderson, Gary J. Policky
  • Patent number: 4739289
    Abstract: A microstrip balun comprises a ceramic substrate having a ground plane on one surface and three elongated conductive strips on the opposite surface. First ends of the outer strips are interconnected with the ground plane through vias in the substrate. The unbalanced signal input is applied to the ground plane near the vias and one end of the inner strip. The other ends of the outer strips are interconnected, and the balanced signal output is taken at this interconnection and at one end of the inner strip. A portion of the ground plane beneath portions of the strips can be removed.
    Type: Grant
    Filed: November 24, 1986
    Date of Patent: April 19, 1988
    Assignee: Celeritek Inc.
    Inventor: Stephen C. Cripps