Patents by Inventor Stephen C. St. Germain

Stephen C. St. Germain has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Lead-free integrated circuit package structure
    Patent number: 7180170
    Abstract: An integrated circuit package (60) has a substrate (12) with a first surface (51) for mounting a semiconductor die (20) and a second surface (52) defining a via (70). A lead (26) is formed by plating a conductive material to project outwardly from the second surface. The conductive material extends from the lead through the first via for coupling to the semiconductor die.
    Type: Grant
    Filed: January 24, 2005
    Date of Patent: February 20, 2007
    Assignee: Semiconductor Components Industries, L.L.C.
    Inventors: Phillip C. Celaya, James S. Donley, Stephen C. St. Germain
  • Method of making a lead-free integrated circuit package
    Patent number: 6889429
    Abstract: An integrated circuit package (60) has a substrate (12) with a first surface (51) for mounting a semiconductor die (20) and a second surface (52) defining a via (70). A lead (26) is formed by plating a conductive material to project outwardly from the second surface. The conductive material extends from the lead through the first via for coupling to the semiconductor die.
    Type: Grant
    Filed: March 26, 2001
    Date of Patent: May 10, 2005
    Assignee: Semiconductor Components Industries, L.L.C.
    Inventors: Phillip C. Celaya, James S. Donley, Stephen C. St. Germain
  • Structure and method of forming a multiple leadframe semiconductor device
    Patent number: 6833290
    Abstract: A semiconductor device (20) has a first leadframe (200) with a first semiconductor die (70) electrically coupled to one of its leads. A second semiconductor die (130) is mounted to a second leadframe (300) that has a first lead (35, 150) electrically coupled to the second semiconductor die and a second lead (30, 35) mounted to the lead of the first leadframe.
    Type: Grant
    Filed: February 27, 2003
    Date of Patent: December 21, 2004
    Assignee: Semiconductor Components Industries, L.L.C.
    Inventors: James H. Knapp, Stephen C. St. Germain
  • Structure and method of forming a multiple leadframe semiconductor device
    Patent number: 6677672
    Abstract: A semiconductor device (20) has a first leadframe (200) with a first semiconductor die (70) electrically coupled to one of its leads. A second semiconductor die (130) is mounted to a second leadframe (300) that has a first lead (35, 150) electrically coupled to the second semiconductor die and a second lead (30, 35) mounted to the lead of the first leadframe.
    Type: Grant
    Filed: April 26, 2002
    Date of Patent: January 13, 2004
    Assignee: Semiconductor Components Industries LLC
    Inventors: James H. Knapp, Stephen C. St. Germain
  • Structure and method of forming a multiple leadframe semiconductor device
    Publication number: 20030209804
    Abstract: A semiconductor device (20) has a first leadframe (200) with a first semiconductor die (70) electrically coupled to one of its leads. A second semiconductor die (130) is mounted to a second leadframe (300) that has a first lead (35, 150) electrically coupled to the second semiconductor die and a second lead (30, 35) mounted to the lead of the first leadframe.
    Type: Application
    Filed: April 26, 2002
    Publication date: November 13, 2003
    Applicant: Semiconductor Components Industries, LLC
    Inventors: James H. Knapp, Stephen C. St. Germain
  • Structure and method of forming a multiple leadframe semiconductor device
    Publication number: 20030201520
    Abstract: A semiconductor device (20) has a first leadframe (200) with a first semiconductor die (70) electrically coupled to one of its leads. A second semiconductor die (130) is mounted to a second leadframe (300) that has a first lead (35, 150) electrically coupled to the second semiconductor die and a second lead (30, 35) mounted to the lead of the first leadframe.
    Type: Application
    Filed: February 27, 2003
    Publication date: October 30, 2003
    Inventors: James H. Knapp, Stephen C. St. Germain
  • Integrated circuit package and method
    Publication number: 20020134582
    Abstract: An integrated circuit package(60) has a substrate (12) with a first surface (51) for mounting a semiconductor die (20) and a second surface (52) defining a via (70). A lead (26) is formed by plating a conductive material to project outwardly from the second surface. The conductive material extends from the lead through the first via for coupling to the semiconductor die.
    Type: Application
    Filed: March 26, 2001
    Publication date: September 26, 2002
    Applicant: Semiconductor Components Industries, LLC.
    Inventors: Phillip C. Celaya, James S. Donley, Stephen C. St. Germain
  • Semiconductor device and method of manufacture
    Patent number: 6103548
    Abstract: A semiconductor device includes a substrate (10) that can be cut into different sizes. A plurality of wirebond fingers (12) are formed on a top surface (13) of the substrate (10). The plurality of wirebond fingers (12) are located within concentric interconnect regions (23, 25, 27, 29, 31, 33, 35) and electrically connected to a via (14) by a signal interconnect line (11). The size of substrate (10) can be altered by cutting the substrate (10) to remove any of the interconnect regions (23, 25, 27, 29, 31, 33, 35). A semiconductor component (44) attached to the top side (13) of the substrate (10) can have a die pad (48) wirebonded to any of the plurality of wirebond fingers (12) located along the signal interconnect line (11) for connection to the via (14).
    Type: Grant
    Filed: September 17, 1997
    Date of Patent: August 15, 2000
    Assignee: Motorola, Inc.
    Inventors: Jeffrey A. Miks, Dilip Patel, Dwight L. Daniels, Stephen C. St. Germain