Abstract: A demagnetizer for an inductive load having a driver circuit including at least one transistor and a ramp-down voltage source switchably connected to the driver circuit, so that when the ramp-down voltage source is connected to the transistor, it drives the voltage of the transistor below its threshold voltage.

Abstract: A method and structure providing a dual layer silicon gate film having a uniform boron distribution therein and an ordered, uniform grain structure. Rapid thermal annealing is used to cause the diffusion of boron from an originally doped film to an originally undoped film, resulting in a uniform boron distribution within the structure, thereby rendering the structure resistant to vertical and lateral diffusion of the boron during subsequent processing at elevated temperatures.

Abstract: The specification describes a dual patterned polish stop layer technique for shallow trench isolation. The shallow trenches are formed by etching trenches in a semiconductor substrate wafer, backfilling with oxide, and polishing by chemical-mechanical polishing (CMP) to produce a planar, trench isolated, wafer. To ensure planarity of the wafer after CMP, and avoid dishing of the field oxide, a dual silicon nitride polish stop layer is used. The first polish stop layer is applied selectively to protect the active device regions, and the second polish stop layer is applied selectively to protect the field oxide regions.

Abstract: In the fabrication of an integrated circuit, undesirable bird's beak pull back due to damage caused during ion implantation is alleviated by means of rapid thermal annealing step prior to chemical etching.