Abstract: This invention provides a computer-implemented method of modifying an algorithm operating on a computing system, and a device for implementing said method, the method comprising the steps of: applying the algorithm to a first set of inputs; determining a relevance score for a first input of the first set of inputs based on: a first effectiveness value of the first input, wherein the first effectiveness value represents a contribution of first input to the algorithm, and a first computational cost of the first input, wherein the 1 first computational cost represents the computational resources of using the first input in the algorithm; defining a second set of inputs based on the determined relevance score of the first input; and applying the algorithm to the second set of inputs.

Abstract: This disclosure relates to a computer-implemented method of controlling an algorithm, and a device for implementing said method, the method including developing the algorithm from a first state to a second state by a machine learning process; determining a second computational cost of executing the algorithm in its second state; determining if the second computational cost satisfies a trigger condition; and, if so, consolidating the algorithm from the second state to a third state, wherein a third computational cost of executing the algorithm in its third state is less than the second computational cost.

Abstract: This invention provides an autonomic method for controlling an algorithm on a multi-terminal computing system, wherein the algorithm is configured to analyse diagnostic data for each terminal and an outcome of the analysis is a first action or a second action, and a device for implementing the method, the method comprising the steps of: receiving a first set of data for the multi-terminal computing system; applying the algorithm to the first set of data to classify each terminal in the multi-terminal computing system as being associated with either a first action or second action; re-classifying a first subset of terminals classified as being associated with the first action as being associated with the second action; and applying the first actions, second actions, and reclassified second actions respectively to each terminal in the multi-terminal computing system.

Abstract: This invention provides a computer-implemented method of modifying an algorithm operating on a computing system, and a device for implementing said method, the method comprising the steps of: applying the algorithm to a first set of inputs; determining a relevance score for a first input of the first set of inputs based on: a first effectiveness value of the first input, wherein the first effectiveness value represents a contribution of first input to the algorithm, and a first computational cost of the first input, wherein the 1 first computational cost represents the computational resources of using the first input in the algorithm; defining a second set of inputs based on the determined relevance score of the first input; and applying the algorithm to the second set of inputs.

Abstract: A neural inference chip is provided, including at least one neural inference core. The at least one neural inference core is adapted to apply a plurality of synaptic weights to a plurality of input activations to produce a plurality of intermediate outputs. The at least one neural inference core comprises a plurality of activation units configured to receive the plurality of intermediate outputs and produce a plurality of activations. Each of the plurality of activation units is configured to apply a configurable activation function to its input. The configurable activation function has at least a re-ranging term and a scaling term, the re-ranging term determining the range of the activations and the scaling term determining the scale of the activations. Each of the plurality of activations units is configured to obtain the re-ranging term and the scaling term from one or more look up tables.

Abstract: Systems are provided that can produce symbolic and numeric representations of the neural network outputs, such that these outputs can be used to validate correctness of the implementation of the neural network. In various embodiments, a description of an artificial neural network containing no data-dependent branching is read. Based on the description of the artificial neural network, a symbolic representation is constructed of an output of the artificial neural network, the symbolic representation comprising at least one variable. The symbolic representation is compared to a ground truth symbolic representation, thereby validating the neural network system.

Abstract: Modular neural network computing apparatus are provided with distributed neural network storage. In various embodiments, a neural inference processor comprises a plurality of neural inference cores, at least one model network interconnecting the plurality of neural inference cores, and at least one activation network interconnecting the plurality of neural inference cores. Each of the plurality of neural inference cores comprises memory adapted to store input activations, output activations, and a neural network model. The neural network model comprises synaptic weights, neuron parameters, and neural network instructions. The at least one model network is configured to distribute the neural network model among the plurality of neural inference cores. Each of the plurality of neural inference cores is configured to apply the synaptic weights to input activations from its memory to produce a plurality of output activations to its memory.

Abstract: Simulation and validation of neural network systems is provided. In various embodiments, a description of an artificial neural network is read. A directed graph is constructed comprising a plurality of edges and a plurality of nodes, each of the plurality of edges corresponding to a queue and each of the plurality of nodes corresponding to a computing function of the neural network system. A graph state is updated over a plurality of time steps according to the description of the neural network, the graph state being defined by the contents of each of the plurality of queues. Each of a plurality of assertions is tested at each of the plurality of time steps, each of the plurality of assertions being a function of a subset of the graph state. Invalidity of the neural network system is indicated for each violation of one of the plurality of assertions.

Abstract: Neural network accelerator output ranking is provided. In various embodiments, a system comprises a data memory; a memory controller configured to access the data memory; a plurality of comparators configured in a tree; a register; and a two-way comparator. The memory controller is configured to provide a first plurality of values from the data memory to the comparator tree. The comparator tree is configured to perform a plurality of concurrent pairwise comparisons of the first plurality of values to arrive at a first greatest value of the first plurality of values. The two-way comparator is configured to output the greater of the greatest value from the comparator tree and a stored value from the register. The register is configured to store the output of the two-way comparator.

Abstract: Chips supporting constant time program control of nested loops are provided. In various embodiments, a chip comprises at least one arithmetic-logic computing unit and a controller operatively coupled to the at least one arithmetic-logic computing unit. The controller is configured according to a program configuration, the program configuration comprising at least one inner loop and at least one outer loop. The controller is configured to cause the at least one arithmetic computing unit to execute a plurality of operations according to the program configuration. The controller is configured to maintain at least a first loop counter and a second loop counter, the first loop counter configured to count a number of executed iterations of the at least one outer loop, and the second loop counter configured to count a number of executed iterations of the at least one inner loop.

Abstract: Conflict-free, stall-free, broadcast networks on neural inference chips are provided. In various embodiments, a neural inference chip comprises a plurality of network nodes and a network on chip interconnecting the plurality of network nodes. The network comprises at least one pair of directional paths. The paths of each pair have opposite directions and a common end. The network is configured to accept data at any of the plurality of nodes. The network is configured to propagate data along a first of the pair of directional paths from a source node to the common end of the pair of directional paths and along a second of the pair of directional paths from the common end of the pair of directional paths to one or more destination node.

Abstract: A neural network processor system is provided comprising at least one neural network processing core, an activation memory, an instruction memory, and at least one control register, the neural network processing core adapted to implement neural network computation, control and communication primitives. A memory map is included which comprises regions corresponding to each of the activation memory, instruction memory, and at least one control register. Additionally, an interface operatively connected to the neural network processor system is included, with the interface being adapted to communicate with a host and to expose the memory map.

Abstract: This disclosure relates to a computer-implemented method of controlling an algorithm, and a device for implementing said method, the method including developing the algorithm from a first state to a second state by a machine learning process; determining a second computational cost of executing the algorithm in its second state; determining if the second computational cost satisfies a trigger condition; and, if so, consolidating the algorithm from the second state to a third state, wherein a third computational cost of executing the algorithm in its third state is less than the second computational cost.

Abstract: This invention provides an autonomic method for controlling an algorithm on a multi-terminal computing system, wherein the algorithm is configured to analyse diagnostic data for each terminal and an outcome of the analysis is a first action or a second action, and a device for implementing the method, the method comprising the steps of: receiving a first set of data for the multi-terminal computing system; applying the algorithm to the first set of data to classify each terminal in the multi-terminal computing system as being associated with either a first action or second action; re-classifying a first subset of terminals classified as being associated with the first action as being associated with the second action; and applying the first actions, second actions, and reclassified second actions respectively to each terminal in the multi-terminal computing system.

Abstract: The operation of base stations in a wireless network whose areas of coverage do not overlap are synchronized by taking timing values from mobile units that travel from one area of coverage to another. A base station receiving a timing value from a mobile unit entering its area of coverage adapts its timing value and that of any mobile units in its coverage area, including the newly-arrived mobile unit, to a become a value intermediate between its existing timing value and that indicated by the mobile unit. The use of an intermediate value instability in the system that might result from an inability of the base stations to communicate directly with each other in real time.

Abstract: The operation of base stations in a wireless network whose areas of coverage do not overlap are synchronized by taking timing values from mobile units that travel from one area of coverage to another. A base station receiving a timing value from a mobile unit entering its area of coverage adapts its timing value and that of any mobile units in its coverage area, including the newly-arrived mobile unit, to a become a value intermediate between its existing timing value and that indicated by the mobile unit. The use of an intermediate value instability in the system that might result from an inability of the base stations to communicate directly with each other in real time.

Abstract: A user accesses a destination such as a call center. The call center generates a record for insertion into the user's personal address book, with a telephone number of the center and metadata concerning a transaction. To place a later call on the same matter, the user selects, either using his telephone or via a separate terminal, the address book entry and the call is made. The center receives the user's telephone number via the calling line identity (CLI) and translates this into a data address so that it can “pull” the metadata from the personal address book. Alternatively the server can translate the center's telephone number into a data address to “push” the metadata to the center.

Abstract: A user accesses a destination such as a call centre 6; the call centre generates a record for insertion into the user's personal address book (e.g. at server 3) with a telephone number of the centre 6 and metadata concerning a transaction. To place a later call on the same matter, the user selects, either using his telephone or via a separate terminal, the address book entry and the call is made. The centre 6 receives the user's telephone number via the calling line identity (CLI) and translates this (at 8) into a data address whereby it can “pull” the metadata from the personal address book at 3. Alternatively the server 3 can translate the centre's telephone number into a data address to “push” the metadata to the centre.

Abstract: A textile duct for an air circulation system, the duct having an inner gas-permeable layer and an outer gas-impervious layer, and one or more spaces therebetween. An air circulation system having one or more ducts and one or more air treatment units and/or air handling units. The ducts are formed from laminates suitable for forming a duct for an air circulation system, the laminate has an inner gas-permeable layer and an outer gas-impervious layer, and one or more spaces therebetween.

Abstract: This invention relates to a duct suitable for use in an air circulation system, the duct comprising an inner gas-permeable layer and an outer gas-impervious layer, and one or more spaces therebetween.